[PATCH] D55810: [Power9] Enable the Out-of-Order scheduling model for P9 hw
qshanz via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 2 21:08:08 PST 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL350285: [Power9] Enable the Out-of-Order scheduling model for P9 hw (authored by qshanz, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D55810?vs=178596&id=179996#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D55810/new/
https://reviews.llvm.org/D55810
Files:
llvm/trunk/lib/Target/PowerPC/PPCScheduleP9.td
llvm/trunk/test/CodeGen/PowerPC/PR33671.ll
llvm/trunk/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
llvm/trunk/test/CodeGen/PowerPC/build-vector-tests.ll
llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
llvm/trunk/test/CodeGen/PowerPC/f128-aggregates.ll
llvm/trunk/test/CodeGen/PowerPC/f128-arith.ll
llvm/trunk/test/CodeGen/PowerPC/f128-conv.ll
llvm/trunk/test/CodeGen/PowerPC/f128-passByValue.ll
llvm/trunk/test/CodeGen/PowerPC/f128-truncateNconv.ll
llvm/trunk/test/CodeGen/PowerPC/mi-scheduling-lhs.ll
llvm/trunk/test/CodeGen/PowerPC/mulld.ll
llvm/trunk/test/CodeGen/PowerPC/pre-inc-disable.ll
llvm/trunk/test/CodeGen/PowerPC/scalar_vector_test_2.ll
llvm/trunk/test/CodeGen/PowerPC/scalar_vector_test_4.ll
llvm/trunk/test/CodeGen/PowerPC/store_fptoi.ll
llvm/trunk/test/CodeGen/PowerPC/stwu-sched.ll
llvm/trunk/test/CodeGen/PowerPC/swaps-le-6.ll
llvm/trunk/test/CodeGen/PowerPC/vec-itofp.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
llvm/trunk/test/CodeGen/PowerPC/vsx-p9.ll
llvm/trunk/test/CodeGen/PowerPC/vsx-spill.ll
llvm/trunk/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
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