[PATCH] D55722: [DAGCombiner] scalarize binop followed by extractelement
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 2 12:54:26 PST 2019
spatel updated this revision to Diff 179926.
spatel added a comment.
Patch updated:
Avoid controversy by adding a default-off TLI hook for this transform. Enable it for x86, so those diffs are similar to the previous rev of the patch. No ARM changes now, and also no SystemZ changes (probably better to fix the BYTE_MASK transform first?).
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D55722/new/
https://reviews.llvm.org/D55722
Files:
include/llvm/CodeGen/TargetLowering.h
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h
test/CodeGen/X86/and-load-fold.ll
test/CodeGen/X86/extract-fp.ll
test/CodeGen/X86/horizontal-reduce-smax.ll
test/CodeGen/X86/horizontal-reduce-smin.ll
test/CodeGen/X86/horizontal-reduce-umax.ll
test/CodeGen/X86/horizontal-reduce-umin.ll
test/CodeGen/X86/known-bits-vector.ll
test/CodeGen/X86/known-signbits-vector.ll
test/CodeGen/X86/pr30511.ll
test/CodeGen/X86/setcc-combine.ll
test/CodeGen/X86/shrink_vmul-widen.ll
test/CodeGen/X86/shrink_vmul.ll
test/CodeGen/X86/vector-fshl-128.ll
test/CodeGen/X86/vector-fshl-rot-128.ll
test/CodeGen/X86/vector-fshr-128.ll
test/CodeGen/X86/vector-fshr-rot-128.ll
test/CodeGen/X86/vector-gep.ll
test/CodeGen/X86/vector-reduce-smax-widen.ll
test/CodeGen/X86/vector-reduce-smax.ll
test/CodeGen/X86/vector-reduce-smin-widen.ll
test/CodeGen/X86/vector-reduce-smin.ll
test/CodeGen/X86/vector-reduce-umax-widen.ll
test/CodeGen/X86/vector-reduce-umax.ll
test/CodeGen/X86/vector-reduce-umin-widen.ll
test/CodeGen/X86/vector-reduce-umin.ll
test/CodeGen/X86/vector-rotate-128.ll
test/CodeGen/X86/xor.ll
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