[llvm] r350172 - [DAGCombiner] Add missing one use check on the shuffle in the bitcast(shuffle(bitcast(s0), bitcast(s1))) -> shuffle(s0, s1) transform.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 30 21:40:46 PST 2018


Author: ctopper
Date: Sun Dec 30 21:40:46 2018
New Revision: 350172

URL: http://llvm.org/viewvc/llvm-project?rev=350172&view=rev
Log:
[DAGCombiner] Add missing one use check on the shuffle in the bitcast(shuffle(bitcast(s0),bitcast(s1))) -> shuffle(s0,s1) transform.

Found while trying out some other changes so I don't really have a test case.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=350172&r1=350171&r2=350172&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Dec 30 21:40:46 2018
@@ -10156,7 +10156,7 @@ SDValue DAGCombiner::visitBITCAST(SDNode
   // float vectors bitcast to integer vectors) into shuffles.
   // bitcast(shuffle(bitcast(s0),bitcast(s1))) -> shuffle(s0,s1)
   if (Level < AfterLegalizeDAG && TLI.isTypeLegal(VT) && VT.isVector() &&
-      N0->getOpcode() == ISD::VECTOR_SHUFFLE &&
+      N0->getOpcode() == ISD::VECTOR_SHUFFLE && N0.hasOneUse() &&
       VT.getVectorNumElements() >= N0.getValueType().getVectorNumElements() &&
       !(VT.getVectorNumElements() % N0.getValueType().getVectorNumElements())) {
     ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N0);




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