[PATCH] D56148: [PowerPC] Fix machine verify pass error for PATCHPOINT pseudo instruction that bad machine code

Zhang Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 30 07:17:40 PST 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL350165: [PowerPC] Fix machine verify pass error for PATCHPOINT pseudo instruction that… (authored by ZhangKang, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D56148?vs=179721&id=179729#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56148/new/

https://reviews.llvm.org/D56148

Files:
  llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
  llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc.ll
  llvm/trunk/test/CodeGen/PowerPC/ppc64-patchpoint.ll
  llvm/trunk/test/CodeGen/PowerPC/ppc64-stackmap.ll


Index: llvm/trunk/test/CodeGen/PowerPC/ppc64-stackmap.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc64-stackmap.ll
+++ llvm/trunk/test/CodeGen/PowerPC/ppc64-stackmap.ll
@@ -1,4 +1,4 @@
-; RUN: llc                             < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
 ;
 ; Note: Print verbose stackmaps using -debug-only=stackmaps.
 
Index: llvm/trunk/test/CodeGen/PowerPC/ppc64-patchpoint.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc64-patchpoint.ll
+++ llvm/trunk/test/CodeGen/PowerPC/ppc64-patchpoint.ll
@@ -1,7 +1,7 @@
-; RUN: llc                             < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
-; RUN: llc -fast-isel -fast-isel-abort=1 < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
-; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu                             < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
-; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -fast-isel -fast-isel-abort=1 < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
+; RUN: llc -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
 
 target triple = "powerpc64-unknown-linux-gnu"
 
Index: llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
+++ llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
+; RUN: not llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
 ;
 ; Check that misuse of anyregcc results in a compile time error.
 
Index: llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc.ll
+++ llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
Index: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -5097,9 +5097,15 @@
 
   // All calls, in both the ELF V1 and V2 ABIs, need the TOC register live
   // into the call.
-  if (isSVR4ABI && isPPC64 && !isPatchPoint) {
+  // We do need to reserve X2 to appease the verifier for the PATCHPOINT.
+  if (isSVR4ABI && isPPC64) {
     setUsesTOCBasePtr(DAG);
-    Ops.push_back(DAG.getRegister(PPC::X2, PtrVT));
+
+    // We cannot add X2 as an operand here for PATCHPOINT, because there is no
+    // way to mark dependencies as implicit here. We will add the X2 dependency
+    // in EmitInstrWithCustomInserter.
+    if (!isPatchPoint) 
+      Ops.push_back(DAG.getRegister(PPC::X2, PtrVT));
   }
 
   return CallOpc;
@@ -10346,7 +10352,6 @@
       // way to mark the dependence as implicit there, and so the stackmap code
       // will confuse it with a regular operand. Instead, add the dependence
       // here.
-      setUsesTOCBasePtr(*BB->getParent());
       MI.addOperand(MachineOperand::CreateReg(PPC::X2, false, true));
     }
 


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