[PATCH] D54583: PowerPC: Optimize SPE double parameter calling setup

Nemanja Ivanovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 30 05:13:59 PST 2018


nemanjai added inline comments.


================
Comment at: lib/Target/PowerPC/PPCISelLowering.h:203
+      /// Extract high SPE register component
+      EXTRACT_SPE_HI,
+
----------------
jhibbits wrote:
> nemanjai wrote:
> > Why not just have `EXTRACT_SPE_OP` and have it take a constant operand that determines Hi/Lo? Also, for both build and extract, it would be good to add a comment that these correspond almost exactly to `BUILD_PAIR` and `EXTRACT_VECTOR_ELT` nodes except that the input types are floating point since `i64` isn't a legal type for the target.
> I'm not sure how to pass a constant through to the tablegen'd layer.  These two pseudo-ops are just light wrappers to EVMERGEHI and MR.  If there is a way to pass a constant and do the switch down in that layer, then that's acceptable as well.
Sure, there are existing examples. Vector conversion custom nodes are probably quite similar to what you need:
```
PPCISD::SINT_VEC_TO_FP
PPCISD::UINT_VEC_TO_FP
```
But there will be others.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54583/new/

https://reviews.llvm.org/D54583





More information about the llvm-commits mailing list