[PATCH] D47332: [PowerPC] Exploit the vector min/max instructions
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 29 16:37:33 PST 2018
nemanjai marked an inline comment as done.
nemanjai added a comment.
In D47332#1330931 <https://reviews.llvm.org/D47332#1330931>, @RKSimon wrote:
> This covers PR39130 right?
>
> Maybe worth adding the new vec-min-max.ll test file to trunk with current codegen so this patch shows the improved codegen diff?
Yes, this will fix the PR for vector types. Scalar types will come later.
================
Comment at: test/CodeGen/PowerPC/vec-min-max.ll:5
+; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr7 \
+; RUN: -verify-machineinstrs | FileCheck %s --check-prefix=NOP8VEC
+define <16 x i8> @getsmaxi8(<16 x i8> %a, <16 x i8> %b) {
----------------
RKSimon wrote:
> You might be better using common prefixes to share (and reduce) checks.
>
> --check-prefixes=CHECK,P8VEC
> --check-prefixes=CHECK,NOP8VEC
Oh cool. I was not aware of this functionality. Thank you.
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rL LLVM
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https://reviews.llvm.org/D47332/new/
https://reviews.llvm.org/D47332
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