[PATCH] D56148: [PowerPC] Fix machine verify pass error for PATCHPOINT pseudo instruction that bad machine code

[Zhang Kang via Phabricator via llvm-commits]

ZhangKang created this revision.
ZhangKang added reviewers: nemanjai, jsji, echristo, steven.zhang, hfinkel.

This patch to fix below patchpoint error when using `verify-machineinstrs` option:

  *** Bad machine code: Using an undefined physical register ***
  - function:    test
  - basic block: %bb.0 entry (0x1002e0ed008)
  - instruction: PATCHPOINT 0, 40, 0, 2, 13, killed %1:gprc, killed %0:gprc, 2, 3, <regmask $cr0 $cr1 $cr2 $cr3 $cr4 $cr5 $cr6 $cr7 $f0 $f1 $f2 $f3 $f4 $f5 $f6 $f7 $f8 $f9 $f10 $f11 $f12 $f13 $f14 $f15 $f16 $f17 $f18 $f19 $f20 $f21 $f22 $f23 $f24 and 93 more...>, implicit-def dead early-clobber $x12, implicit-def dead early-clobber $lr8, implicit-def dead early-clobber $ctr8, implicit-def $r1, implicit $x2
  - operand 14:   implicit $x2

For SDAG, we pretend patchpoints aren't special at all until we emit the code for the pseudo.
Then the verifier runs and it seems like we have a use of an undefined register (the register will 
be reserved later, but the verifier doesn't know that).

So this rell-request  call `setUsesTOCBasePtr` before emit the code for the pseudo, so verifier 
can know X2 is a reserved register.


https://reviews.llvm.org/D56148

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
  llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll
  llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll
  llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll


Index: llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
+++ llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
@@ -1,4 +1,4 @@
-; RUN: llc                             < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
 ;
 ; Note: Print verbose stackmaps using -debug-only=stackmaps.
 
Index: llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll
+++ llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll
@@ -1,7 +1,7 @@
-; RUN: llc                             < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
-; RUN: llc -fast-isel -fast-isel-abort=1 < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
-; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu                             < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
-; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -fast-isel -fast-isel-abort=1 < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
+; RUN: llc -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
 
 target triple = "powerpc64-unknown-linux-gnu"
 
Index: llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll
+++ llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
Index: llvm/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
+++ llvm/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
+; RUN: not llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
 ;
 ; Check that misuse of anyregcc results in a compile time error.
 
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -5088,10 +5088,15 @@
 
   // All calls, in both the ELF V1 and V2 ABIs, need the TOC register live
   // into the call.
-  if (isSVR4ABI && isPPC64 && !isPatchPoint) {
+  // We do need to reserve X2 to appease the verifier for the PATCHPOINT.
+  if (isSVR4ABI && isPPC64)
     setUsesTOCBasePtr(DAG);
+
+  // We cannot add X2 as an operand here for PATCHPOINT, because there is no
+  // way to mark dependencies as implicit here. We will add the X2 dependency
+  // in EmitInstrWithCustomInserter.
+  if (isSVR4ABI && isPPC64 && !isPatchPoint) 
     Ops.push_back(DAG.getRegister(PPC::X2, PtrVT));
-  }
 
   return CallOpc;
 }
@@ -10304,7 +10309,6 @@
       // way to mark the dependence as implicit there, and so the stackmap code
       // will confuse it with a regular operand. Instead, add the dependence
       // here.
-      setUsesTOCBasePtr(*BB->getParent());
       MI.addOperand(MachineOperand::CreateReg(PPC::X2, false, true));
     }
 


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