[PATCH] D56082: [X86][SLP] Enable SLP vectorization for 128-bit horizontal X86 instructions (add, sub)

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 28 02:30:55 PST 2018


lebedev.ri added inline comments.


================
Comment at: test/Transforms/SLPVectorizer/X86/vec-reg-64bit.ll:12-37
+; SEMI128-LABEL: @add_pairs_128(
+; SEMI128-NEXT:    [[TMP3:%.*]] = extractelement <4 x float> [[TMP0:%.*]], i32 0
+; SEMI128-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
+; SEMI128-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
+; SEMI128-NEXT:    [[TMP6:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
+; SEMI128-NEXT:    [[TMP7:%.*]] = insertelement <2 x float> undef, float [[TMP3]], i32 0
+; SEMI128-NEXT:    [[TMP8:%.*]] = insertelement <2 x float> [[TMP7]], float [[TMP5]], i32 1
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There are no run lines for these prefixes.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56082/new/

https://reviews.llvm.org/D56082





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