[PATCH] D56087: [TargetLowering][AMDGPU] Remove the SimplifyDemandedBits function that takes a User and OpIdx. Stop using it in AMDGPU target for simplifyI24.

[Craig Topper via Phabricator via llvm-commits]

craig.topper marked 2 inline comments as done.
craig.topper added inline comments.


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Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2723
   SelectionDAG &DAG = DCI.DAG;
-  SDValue Op = Node24->getOperand(OpIdx);
-  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
-  EVT VT = Op.getValueType();
+  EVT VT = Node24->getOperand(0).getValueType();
 
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RKSimon wrote:
> Worth putting this after the LHS/RHS so we don't call getOperand more than necessary?
Will do


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Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:4325
+      bool RHSNegative = RHSKnown.isNegative();
+      bool RHSPositive = RHSKnown.isNonNegative();
       if ((!LHSNegative && !LHSPositive) || (!RHSNegative && !RHSPositive))
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RKSimon wrote:
> This looks (mostly) like an NFC? Just commit the bits that you can?
The part I'm most concerned about is that MUL_U24 is now using countMinLeadingZeros. I couldn't figure out why it was using countMinSignBits for both signed and unsigned before


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56087/new/

https://reviews.llvm.org/D56087