[PATCH] D55977: [PowerPC] Fix the bug of ISD::ADDE to set its second return type to glue

Zhang Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 24 19:33:31 PST 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL350061: [PowerPC] Fix the bug of ISD::ADDE to set its second return type to glue (authored by ZhangKang, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D55977?vs=179215&id=179486#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55977/new/

https://reviews.llvm.org/D55977

Files:
  llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/trunk/test/CodeGen/PowerPC/adde_return_type.ll


Index: llvm/trunk/test/CodeGen/PowerPC/adde_return_type.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/adde_return_type.ll
+++ llvm/trunk/test/CodeGen/PowerPC/adde_return_type.ll
@@ -0,0 +1,11 @@
+; REQUIRES: asserts
+; RUN: llc -mtriple=powerpc64le-unknown-unknown -debug-only=legalize-types \
+; RUN:   < %s -o /dev/null 2>&1 | FileCheck %s
+
+define i64 @testAddeReturnType(i64 %X, i64 %Z) {
+; CHECK: Legally typed node: {{.*}}: i64,glue = adde {{.*}} 
+  %cmp = icmp ne i64 %Z, 0
+  %conv1 = zext i1 %cmp to i64
+  %add = add nsw i64 %conv1, %X
+  ret i64 %add
+}
Index: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -14389,7 +14389,7 @@
     return SDValue();
 
   SDLoc DL(N);
-  SDVTList VTs = DAG.getVTList(MVT::i64, MVT::i64);
+  SDVTList VTs = DAG.getVTList(MVT::i64, MVT::Glue);
   SDValue Cmp = RHS.getOperand(0);
   SDValue Z = Cmp.getOperand(0);
   auto *Constant = dyn_cast<ConstantSDNode>(Cmp.getOperand(1));


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