[PATCH] D56057: [X86] Individually simplify both operands of PMULDQ/PMULUDQ using the other entry point of SimplifyDemandedBits that allows the one use check of the root node to be suppressed.

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 23 06:44:15 PST 2018


RKSimon added a comment.

Its really annoying that we have to do this but I can't see any other way.



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:41275
 
   // PMULDQ/PMULUDQ only uses lower 32 bits from each vector element.
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
----------------
Add a comment explaining what we're we having to do here.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:41278
+  APInt DemandedMask = APInt::getLowBitsSet(64, 32);
+  {
+    TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
----------------
Is it worth moving this code inside SimplifyDemandedBitsForTargetNode?

Wrap this in a for loop to reduce code?

```
for {int OpIdx  = 0; OpIdx != 2; ++OpIdx) {
    TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
                                          !DCI.isBeforeLegalizeOps());
    if (TLI.SimplifyDemandedBits(N, OpIdx, DemandedMask, DCI, TLO)) {
      DCI.AddToWorklist(N);
      return SDValue(N, 0);
    }
}
```


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56057/new/

https://reviews.llvm.org/D56057





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