[PATCH] D55867: [RegisterCoalescer] dst register's live interval needs to be updated when merging a src register in ToBeUpdated set
Wei Mi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 21 11:36:11 PST 2018
wmi added inline comments.
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Comment at: test/CodeGen/X86/late-remat-update-2.mir:1
+# REQUIRES: asserts
+# RUN: llc -mtriple=x86_64-- -run-pass=simple-register-coalescing -late-remat-update-threshold=0 -debug-only=regalloc %s -o /dev/null 2>&1 | FileCheck %s
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qcolombet wrote:
> Could you come up with checks that don't require asserts?
Done. Thanks for the suggestion!
Repository:
rL LLVM
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https://reviews.llvm.org/D55867/new/
https://reviews.llvm.org/D55867
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