[PATCH] D56008: [ARM] Alter the register allocation order for optsize on Thumb2

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 21 09:00:43 PST 2018


dmgreen created this revision.
dmgreen added reviewers: efriedma, t.p.northover, john.brawn.
Herald added subscribers: kristof.beyls, javed.absar.

Currently in Arm code, we allocate LR first, under the assumption that
it needs to be saved anyway. Unfortunately this has the disadvantage
that it will require any instructions using it to be the longer thumb2
instructions, not the shorter thumb1 ones.

This switches the order when we are optimising for minsize, returning to
the default order so that more lower registers can be used. It can end
up requiring more pushed registers, but on average produces smaller code.


https://reviews.llvm.org/D56008

Files:
  lib/Target/ARM/ARMRegisterInfo.td
  test/CodeGen/Thumb2/reg-order.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D56008.179295.patch
Type: text/x-patch
Size: 5915 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20181221/87324e17/attachment.bin>


More information about the llvm-commits mailing list