[llvm] r349803 - [ConstantFolding] Add tests for funnel shifts with undef operands; NFC
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 20 11:46:39 PST 2018
Author: nikic
Date: Thu Dec 20 11:46:39 2018
New Revision: 349803
URL: http://llvm.org/viewvc/llvm-project?rev=349803&view=rev
Log:
[ConstantFolding] Add tests for funnel shifts with undef operands; NFC
Modified:
llvm/trunk/test/Analysis/ConstantFolding/funnel-shift.ll
Modified: llvm/trunk/test/Analysis/ConstantFolding/funnel-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ConstantFolding/funnel-shift.ll?rev=349803&r1=349802&r2=349803&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/ConstantFolding/funnel-shift.ll (original)
+++ llvm/trunk/test/Analysis/ConstantFolding/funnel-shift.ll Thu Dec 20 11:46:39 2018
@@ -81,3 +81,170 @@ define <4 x i8> @fshr_v4i8() {
ret <4 x i8> %f
}
+; Undef handling
+
+define i32 @fshl_scalar_all_undef() {
+; CHECK-LABEL: @fshl_scalar_all_undef(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshl.i32(i32 undef, i32 undef, i32 undef)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshl.i32(i32 undef, i32 undef, i32 undef)
+ ret i32 %f
+}
+
+define i32 @fshr_scalar_all_undef() {
+; CHECK-LABEL: @fshr_scalar_all_undef(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshr.i32(i32 undef, i32 undef, i32 undef)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshr.i32(i32 undef, i32 undef, i32 undef)
+ ret i32 %f
+}
+
+define i32 @fshl_scalar_undef_shamt() {
+; CHECK-LABEL: @fshl_scalar_undef_shamt(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshl.i32(i32 1, i32 2, i32 undef)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshl.i32(i32 1, i32 2, i32 undef)
+ ret i32 %f
+}
+
+define i32 @fshr_scalar_undef_shamt() {
+; CHECK-LABEL: @fshr_scalar_undef_shamt(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshr.i32(i32 1, i32 2, i32 undef)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshr.i32(i32 1, i32 2, i32 undef)
+ ret i32 %f
+}
+
+define i32 @fshl_scalar_undef_ops() {
+; CHECK-LABEL: @fshl_scalar_undef_ops(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshl.i32(i32 undef, i32 undef, i32 7)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshl.i32(i32 undef, i32 undef, i32 7)
+ ret i32 %f
+}
+
+define i32 @fshr_scalar_undef_ops() {
+; CHECK-LABEL: @fshr_scalar_undef_ops(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshr.i32(i32 undef, i32 undef, i32 7)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshr.i32(i32 undef, i32 undef, i32 7)
+ ret i32 %f
+}
+
+define i32 @fshl_scalar_undef_op1_zero_shift() {
+; CHECK-LABEL: @fshl_scalar_undef_op1_zero_shift(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshl.i32(i32 undef, i32 1, i32 0)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshl.i32(i32 undef, i32 1, i32 0)
+ ret i32 %f
+}
+
+define i32 @fshl_scalar_undef_op2_zero_shift() {
+; CHECK-LABEL: @fshl_scalar_undef_op2_zero_shift(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshl.i32(i32 1, i32 undef, i32 32)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshl.i32(i32 1, i32 undef, i32 32)
+ ret i32 %f
+}
+
+define i32 @fshr_scalar_undef_op1_zero_shift() {
+; CHECK-LABEL: @fshr_scalar_undef_op1_zero_shift(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshr.i32(i32 undef, i32 1, i32 64)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshr.i32(i32 undef, i32 1, i32 64)
+ ret i32 %f
+}
+
+define i32 @fshr_scalar_undef_op2_zero_shift() {
+; CHECK-LABEL: @fshr_scalar_undef_op2_zero_shift(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshr.i32(i32 1, i32 undef, i32 0)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshr.i32(i32 1, i32 undef, i32 0)
+ ret i32 %f
+}
+
+define i32 @fshl_scalar_undef_op1_nonzero_shift() {
+; CHECK-LABEL: @fshl_scalar_undef_op1_nonzero_shift(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshl.i32(i32 undef, i32 -1, i32 8)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshl.i32(i32 undef, i32 -1, i32 8)
+ ret i32 %f
+}
+
+define i32 @fshl_scalar_undef_op2_nonzero_shift() {
+; CHECK-LABEL: @fshl_scalar_undef_op2_nonzero_shift(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshl.i32(i32 -1, i32 undef, i32 8)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshl.i32(i32 -1, i32 undef, i32 8)
+ ret i32 %f
+}
+
+define i32 @fshr_scalar_undef_op1_nonzero_shift() {
+; CHECK-LABEL: @fshr_scalar_undef_op1_nonzero_shift(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshr.i32(i32 undef, i32 -1, i32 8)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshr.i32(i32 undef, i32 -1, i32 8)
+ ret i32 %f
+}
+
+define i32 @fshr_scalar_undef_op2_nonzero_shift() {
+; CHECK-LABEL: @fshr_scalar_undef_op2_nonzero_shift(
+; CHECK-NEXT: [[F:%.*]] = call i32 @llvm.fshr.i32(i32 -1, i32 undef, i32 8)
+; CHECK-NEXT: ret i32 [[F]]
+;
+ %f = call i32 @llvm.fshr.i32(i32 -1, i32 undef, i32 8)
+ ret i32 %f
+}
+
+; Undef/Undef/Undef; 1/2/Undef; Undef/Undef/3; Undef/1/0
+define <4 x i8> @fshl_vector_mix1() {
+; CHECK-LABEL: @fshl_vector_mix1(
+; CHECK-NEXT: [[F:%.*]] = call <4 x i8> @llvm.fshl.v4i8(<4 x i8> <i8 undef, i8 1, i8 undef, i8 undef>, <4 x i8> <i8 undef, i8 2, i8 undef, i8 1>, <4 x i8> <i8 undef, i8 undef, i8 3, i8 0>)
+; CHECK-NEXT: ret <4 x i8> [[F]]
+;
+ %f = call <4 x i8> @llvm.fshl.v4i8(<4 x i8> <i8 undef, i8 1, i8 undef, i8 undef>, <4 x i8> <i8 undef, i8 2, i8 undef, i8 1>, <4 x i8> <i8 undef, i8 undef, i8 3, i8 0>)
+ ret <4 x i8> %f
+}
+
+; 1/Undef/8; Undef/-1/2; -1/Undef/2; 7/8/4
+define <4 x i8> @fshl_vector_mix2() {
+; CHECK-LABEL: @fshl_vector_mix2(
+; CHECK-NEXT: [[F:%.*]] = call <4 x i8> @llvm.fshl.v4i8(<4 x i8> <i8 1, i8 undef, i8 -1, i8 7>, <4 x i8> <i8 undef, i8 -1, i8 undef, i8 8>, <4 x i8> <i8 8, i8 2, i8 2, i8 4>)
+; CHECK-NEXT: ret <4 x i8> [[F]]
+;
+ %f = call <4 x i8> @llvm.fshl.v4i8(<4 x i8> <i8 1, i8 undef, i8 -1, i8 7>, <4 x i8> <i8 undef, i8 -1, i8 undef, i8 8>, <4 x i8> <i8 8, i8 2, i8 2, i8 4>)
+ ret <4 x i8> %f
+}
+
+; Undef/Undef/Undef; 1/2/Undef; Undef/Undef/3; Undef/1/0
+define <4 x i8> @fshr_vector_mix1() {
+; CHECK-LABEL: @fshr_vector_mix1(
+; CHECK-NEXT: [[F:%.*]] = call <4 x i8> @llvm.fshr.v4i8(<4 x i8> <i8 undef, i8 1, i8 undef, i8 undef>, <4 x i8> <i8 undef, i8 2, i8 undef, i8 1>, <4 x i8> <i8 undef, i8 undef, i8 3, i8 0>)
+; CHECK-NEXT: ret <4 x i8> [[F]]
+;
+ %f = call <4 x i8> @llvm.fshr.v4i8(<4 x i8> <i8 undef, i8 1, i8 undef, i8 undef>, <4 x i8> <i8 undef, i8 2, i8 undef, i8 1>, <4 x i8> <i8 undef, i8 undef, i8 3, i8 0>)
+ ret <4 x i8> %f
+}
+
+; 1/Undef/8; Undef/-1/2; -1/Undef/2; 7/8/4
+define <4 x i8> @fshr_vector_mix2() {
+; CHECK-LABEL: @fshr_vector_mix2(
+; CHECK-NEXT: [[F:%.*]] = call <4 x i8> @llvm.fshr.v4i8(<4 x i8> <i8 1, i8 undef, i8 -1, i8 7>, <4 x i8> <i8 undef, i8 -1, i8 undef, i8 8>, <4 x i8> <i8 8, i8 2, i8 2, i8 4>)
+; CHECK-NEXT: ret <4 x i8> [[F]]
+;
+ %f = call <4 x i8> @llvm.fshr.v4i8(<4 x i8> <i8 1, i8 undef, i8 -1, i8 7>, <4 x i8> <i8 undef, i8 -1, i8 undef, i8 8>, <4 x i8> <i8 8, i8 2, i8 2, i8 4>)
+ ret <4 x i8> %f
+}
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