[PATCH] D52922: AMDGPU/GlobalISel: Move SMRD selection logic to TableGen
Tom Stellard via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 19 20:37:34 PST 2018
tstellar marked an inline comment as done.
tstellar added inline comments.
================
Comment at: lib/Target/AMDGPU/AMDGPUGISel.td:154-155
+// away with adding patterns for integer types and not leaglizing all
+// loads and stores to vector types. This should help simplify the load/store
+// legalization.
+defm : SMRD_Pattern <"S_LOAD_DWORDX2", i64>;
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arsenm wrote:
> I think turning everything into i32 vectors in SelectionDAG was a mistake, but I don't think GlobalISel will have the same issues with it. Floating point loads don't need to be explicitly handled anymore?
Right, loads are select based on type width only.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D52922/new/
https://reviews.llvm.org/D52922
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