[llvm] r349686 - [AArch64] Improve Exynos predicates
Evandro Menezes via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 19 14:24:36 PST 2018
Author: evandro
Date: Wed Dec 19 14:24:36 2018
New Revision: 349686
URL: http://llvm.org/viewvc/llvm-project?rev=349686&view=rev
Log:
[AArch64] Improve Exynos predicates
Expand the predicate `ExynosResetPred` to include all forms of immediate
moves.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td
Modified: llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td?rev=349686&r1=349685&r2=349686&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td Wed Dec 19 14:24:36 2018
@@ -88,12 +88,19 @@ def ExynosResetFn : TIIPredicate<
[ADR, ADRP,
MOVNWi, MOVNXi,
MOVZWi, MOVZXi],
- MCReturnStatement<TruePred>>],
+ MCReturnStatement<TruePred>>,
+ MCOpcodeSwitchCase<
+ [ORRWri, ORRXri],
+ MCReturnStatement<
+ CheckAll<
+ [CheckIsRegOperand<1>,
+ CheckAny<
+ [CheckRegOperand<1, WZR>,
+ CheckRegOperand<1, XZR>]>]>>>],
MCReturnStatement<
CheckAny<
[IsCopyIdiomFn,
- IsZeroFPIdiomFn,
- IsZeroIdiomFn]>>>>;
+ IsZeroFPIdiomFn]>>>>;
def ExynosResetPred : MCSchedPredicate<ExynosResetFn>;
// Identify EXTR as the alias for ROR (immediate).
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