[llvm] r349568 - [AArch64] Fix instructions order (NFC)

[Evandro Menezes via llvm-commits]

Author: evandro
Date: Tue Dec 18 15:19:55 2018
New Revision: 349568

URL: http://llvm.org/viewvc/llvm-project?rev=349568&view=rev
Log:
[AArch64] Fix instructions order (NFC)

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64SchedExynosM1.td

Modified: llvm/trunk/lib/Target/AArch64/AArch64SchedExynosM1.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SchedExynosM1.td?rev=349568&r1=349567&r2=349568&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SchedExynosM1.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SchedExynosM1.td Tue Dec 18 15:19:55 2018
@@ -440,14 +440,14 @@ def : InstRW<[M1WriteCOPY], (instrs COPY
 // Miscellaneous instructions.
 
 // Load instructions.
-def : InstRW<[M1WriteLC,
-              ReadAdrBase], (instregex "^LDR(BB|HH|SBW|SBX|SHW|SWX|SW|W|X)roW")>;
-def : InstRW<[M1WriteL5,
-              ReadAdrBase], (instregex "^LDR(BB|HH|SBW|SBX|SHW|SWX|SW|W|X)roX")>;
 def : InstRW<[M1WriteLB,
               WriteLDHi,
               WriteAdr],    (instregex "^LDP(SW|W|X)(post|pre)")>;
 def : InstRW<[M1WriteLC,
+              ReadAdrBase], (instregex "^LDR(BB|SBW|SBX|HH|SHW|SHX|SW|W|X)roW")>;
+def : InstRW<[M1WriteL5,
+              ReadAdrBase], (instregex "^LDR(BB|SBW|SBX|HH|SHW|SHX|SW|W|X)roX")>;
+def : InstRW<[M1WriteLC,
               ReadAdrBase], (instrs PRFMroW)>;
 def : InstRW<[M1WriteL5,
               ReadAdrBase], (instrs PRFMroX)>;