[llvm] r349537 - [llvm-mca] Update the Exynos test cases (NFC)
Evandro Menezes via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 18 12:46:03 PST 2018
Author: evandro
Date: Tue Dec 18 12:46:03 2018
New Revision: 349537
URL: http://llvm.org/viewvc/llvm-project?rev=349537&view=rev
Log:
[llvm-mca] Update the Exynos test cases (NFC)
Add more entropy to the test cases.
Modified:
llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s
llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/extended-register.s
llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/register-offset.s
llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s
llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s
Modified: llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s?rev=349537&r1=349536&r2=349537&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s (original)
+++ llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s Tue Dec 18 12:46:03 2018
@@ -2,8 +2,7 @@
# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M1
# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M3
-1:
- b 1b
+ b main
# ALL: Iterations: 100
# ALL-NEXT: Instructions: 100
@@ -33,5 +32,5 @@
# ALL: [1] [2] [3] [4] [5] [6] Instructions:
-# M1-NEXT: 1 0 0.25 b .Ltmp0
-# M3-NEXT: 1 0 0.17 b .Ltmp0
+# M1-NEXT: 1 0 0.25 b main
+# M3-NEXT: 1 0 0.17 b main
Modified: llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/extended-register.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/extended-register.s?rev=349537&r1=349536&r2=349537&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/extended-register.s (original)
+++ llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/extended-register.s Tue Dec 18 12:46:03 2018
@@ -1,21 +1,21 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
-# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1
-# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
+# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1
+# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
sub w0, w1, w2, sxtb #0
add x3, x4, w5, sxth #1
subs x6, x7, w8, uxtw #2
adds x9, x10, x11, uxtx #3
- sub w12, w13, w14, uxtb #3
- add x15, x16, w17, uxth #2
- subs x18, x19, w20, sxtw #1
- adds x21, x22, x23, sxtx #0
+ sub w12, w13, w14, uxtb #0
+ add x15, x16, w17, uxth #1
+ subs x18, x19, w20, sxtw #2
+ adds x21, x22, x23, sxtx #3
# ALL: Iterations: 100
# ALL-NEXT: Instructions: 800
# EM1-NEXT: Total Cycles: 403
-# EM3-NEXT: Total Cycles: 303
+# EM3-NEXT: Total Cycles: 304
# ALL-NEXT: Total uOps: 800
@@ -25,8 +25,8 @@
# EM1-NEXT: Block RThroughput: 4.0
# EM3: Dispatch Width: 6
-# EM3-NEXT: uOps Per Cycle: 2.64
-# EM3-NEXT: IPC: 2.64
+# EM3-NEXT: uOps Per Cycle: 2.63
+# EM3-NEXT: IPC: 2.63
# EM3-NEXT: Block RThroughput: 3.0
# ALL: Instruction Info:
@@ -43,16 +43,16 @@
# EM1-NEXT: 1 2 0.67 add x3, x4, w5, sxth #1
# EM1-NEXT: 1 1 0.33 subs x6, x7, w8, uxtw #2
# EM1-NEXT: 1 1 0.33 adds x9, x10, x11, uxtx #3
-# EM1-NEXT: 1 2 0.67 sub w12, w13, w14, uxtb #3
-# EM1-NEXT: 1 2 0.67 add x15, x16, w17, uxth #2
-# EM1-NEXT: 1 2 0.67 subs x18, x19, w20, sxtw #1
-# EM1-NEXT: 1 1 0.33 adds x21, x22, x23, sxtx
+# EM1-NEXT: 1 1 0.33 sub w12, w13, w14, uxtb
+# EM1-NEXT: 1 2 0.67 add x15, x16, w17, uxth #1
+# EM1-NEXT: 1 2 0.67 subs x18, x19, w20, sxtw #2
+# EM1-NEXT: 1 2 0.67 adds x21, x22, x23, sxtx #3
# EM3-NEXT: 1 1 0.25 sub w0, w1, w2, sxtb
# EM3-NEXT: 1 2 0.50 add x3, x4, w5, sxth #1
# EM3-NEXT: 1 1 0.25 subs x6, x7, w8, uxtw #2
# EM3-NEXT: 1 1 0.25 adds x9, x10, x11, uxtx #3
-# EM3-NEXT: 1 2 0.50 sub w12, w13, w14, uxtb #3
-# EM3-NEXT: 1 2 0.50 add x15, x16, w17, uxth #2
-# EM3-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #1
-# EM3-NEXT: 1 1 0.25 adds x21, x22, x23, sxtx
+# EM3-NEXT: 1 1 0.25 sub w12, w13, w14, uxtb
+# EM3-NEXT: 1 2 0.50 add x15, x16, w17, uxth #1
+# EM3-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #2
+# EM3-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #3
Modified: llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/register-offset.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/register-offset.s?rev=349537&r1=349536&r2=349537&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/register-offset.s (original)
+++ llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/register-offset.s Tue Dec 18 12:46:03 2018
@@ -1,25 +1,25 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
-# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1
-# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
+# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1
+# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
- ldr w0, [x1, x2, lsl #0]
- str x3, [x4, w5, sxtw #0]
- ldr x6, [x7, w8, uxtw #3]
+ ldrb w0, [x1, w2, sxtw #0]
+ strh w3, [x4, x5, sxtx #1]
+ ldr w6, [x7, w8, uxtw #2]
str x9, [x10, x11, lsl #3]
# ALL: Iterations: 100
# ALL-NEXT: Instructions: 400
-# ALL-NEXT: Total Cycles: 308
+# ALL-NEXT: Total Cycles: 208
# ALL-NEXT: Total uOps: 600
# EM1: Dispatch Width: 4
-# EM1-NEXT: uOps Per Cycle: 1.95
-# EM1-NEXT: IPC: 1.30
+# EM1-NEXT: uOps Per Cycle: 2.88
+# EM1-NEXT: IPC: 1.92
# EM1-NEXT: Block RThroughput: 2.0
# EM3: Dispatch Width: 6
-# EM3-NEXT: uOps Per Cycle: 1.95
-# EM3-NEXT: IPC: 1.30
+# EM3-NEXT: uOps Per Cycle: 2.88
+# EM3-NEXT: IPC: 1.92
# EM3-NEXT: Block RThroughput: 2.0
# ALL: Instruction Info:
@@ -32,12 +32,12 @@
# ALL: [1] [2] [3] [4] [5] [6] Instructions:
-# EM1-NEXT: 1 5 1.00 * ldr w0, [x1, x2]
-# EM3-NEXT: 1 5 0.50 * ldr w0, [x1, x2]
+# EM1-NEXT: 2 5 1.00 * ldrb w0, [x1, w2, sxtw #0]
+# EM3-NEXT: 2 5 0.50 * ldrb w0, [x1, w2, sxtw #0]
-# ALL-NEXT: 2 2 1.00 * str x3, [x4, w5, sxtw]
+# ALL-NEXT: 1 1 1.00 * strh w3, [x4, x5, sxtx #1]
-# EM1-NEXT: 2 5 1.00 * ldr x6, [x7, w8, uxtw #3]
-# EM3-NEXT: 2 5 0.50 * ldr x6, [x7, w8, uxtw #3]
+# EM1-NEXT: 2 5 1.00 * ldr w6, [x7, w8, uxtw #2]
+# EM3-NEXT: 2 5 0.50 * ldr w6, [x7, w8, uxtw #2]
# ALL-NEXT: 1 1 1.00 * str x9, [x10, x11, lsl #3]
Modified: llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s?rev=349537&r1=349536&r2=349537&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s (original)
+++ llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s Tue Dec 18 12:46:03 2018
@@ -2,7 +2,7 @@
# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -iterations=1 -scheduler-stats -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefixes=ALL,M1
# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -iterations=1 -scheduler-stats -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefixes=ALL,M3
- b t
+ b main
# ALL: Iterations: 1
# ALL-NEXT: Instructions: 1
Modified: llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s?rev=349537&r1=349536&r2=349537&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s (original)
+++ llvm/trunk/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s Tue Dec 18 12:46:03 2018
@@ -1,29 +1,33 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
-# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1
-# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
+# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1
+# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
add w0, w1, w2, lsl #0
sub x3, x4, x5, lsr #1
adds x6, x7, x8, lsl #2
subs w9, w10, w11, asr #3
+ add w12, w13, w14, lsl #4
+ sub x15, x16, x17, lsr #6
+ adds x18, x19, x20, lsl #8
+ subs w21, w22, w23, asr #10
# ALL: Iterations: 100
-# ALL-NEXT: Instructions: 400
+# ALL-NEXT: Instructions: 800
-# EM1-NEXT: Total Cycles: 204
-# EM3-NEXT: Total Cycles: 154
+# EM1-NEXT: Total Cycles: 470
+# EM3-NEXT: Total Cycles: 354
-# ALL-NEXT: Total uOps: 400
+# ALL-NEXT: Total uOps: 800
# EM1: Dispatch Width: 4
-# EM1-NEXT: uOps Per Cycle: 1.96
-# EM1-NEXT: IPC: 1.96
-# EM1-NEXT: Block RThroughput: 2.0
+# EM1-NEXT: uOps Per Cycle: 1.70
+# EM1-NEXT: IPC: 1.70
+# EM1-NEXT: Block RThroughput: 4.7
# EM3: Dispatch Width: 6
-# EM3-NEXT: uOps Per Cycle: 2.60
-# EM3-NEXT: IPC: 2.60
-# EM3-NEXT: Block RThroughput: 1.5
+# EM3-NEXT: uOps Per Cycle: 2.26
+# EM3-NEXT: IPC: 2.26
+# EM3-NEXT: Block RThroughput: 3.5
# ALL: Instruction Info:
# ALL-NEXT: [1]: #uOps
@@ -39,8 +43,16 @@
# EM1-NEXT: 1 2 0.67 sub x3, x4, x5, lsr #1
# EM1-NEXT: 1 1 0.33 adds x6, x7, x8, lsl #2
# EM1-NEXT: 1 2 0.67 subs w9, w10, w11, asr #3
+# EM1-NEXT: 1 2 0.67 add w12, w13, w14, lsl #4
+# EM1-NEXT: 1 2 0.67 sub x15, x16, x17, lsr #6
+# EM1-NEXT: 1 2 0.67 adds x18, x19, x20, lsl #8
+# EM1-NEXT: 1 2 0.67 subs w21, w22, w23, asr #10
# EM3-NEXT: 1 1 0.25 add w0, w1, w2
# EM3-NEXT: 1 2 0.50 sub x3, x4, x5, lsr #1
# EM3-NEXT: 1 1 0.25 adds x6, x7, x8, lsl #2
# EM3-NEXT: 1 2 0.50 subs w9, w10, w11, asr #3
+# EM3-NEXT: 1 2 0.50 add w12, w13, w14, lsl #4
+# EM3-NEXT: 1 2 0.50 sub x15, x16, x17, lsr #6
+# EM3-NEXT: 1 2 0.50 adds x18, x19, x20, lsl #8
+# EM3-NEXT: 1 2 0.50 subs w21, w22, w23, asr #10
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