[llvm] r349466 - [TargetLowering] Fallback from SimplifyDemandedVectorElts to SimplifyDemandedBits
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 18 01:33:25 PST 2018
Author: rksimon
Date: Tue Dec 18 01:33:25 2018
New Revision: 349466
URL: http://llvm.org/viewvc/llvm-project?rev=349466&view=rev
Log:
[TargetLowering] Fallback from SimplifyDemandedVectorElts to SimplifyDemandedBits
For opcodes not covered by SimplifyDemandedVectorElts, SimplifyDemandedBits might be able to help now that it supports demanded elts as well.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/test/CodeGen/X86/known-bits-vector.ll
llvm/trunk/test/CodeGen/X86/shrink_vmul-widen.ll
llvm/trunk/test/CodeGen/X86/shrink_vmul.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=349466&r1=349465&r2=349466&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Dec 18 01:33:25 2018
@@ -1894,10 +1894,17 @@ bool TargetLowering::SimplifyDemandedVec
return true;
break;
default: {
- if (Op.getOpcode() >= ISD::BUILTIN_OP_END)
+ if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
if (SimplifyDemandedVectorEltsForTargetNode(Op, DemandedElts, KnownUndef,
KnownZero, TLO, Depth))
return true;
+ } else {
+ KnownBits Known;
+ APInt DemandedBits = APInt::getAllOnesValue(EltSizeInBits);
+ if (SimplifyDemandedBits(Op, DemandedBits, DemandedEltMask, Known, TLO,
+ Depth, AssumeSingleUse))
+ return true;
+ }
break;
}
}
Modified: llvm/trunk/test/CodeGen/X86/known-bits-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/known-bits-vector.ll?rev=349466&r1=349465&r2=349466&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/known-bits-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/known-bits-vector.ll Tue Dec 18 01:33:25 2018
@@ -499,14 +499,12 @@ declare <4 x i32> @llvm.x86.sse41.pminud
define <4 x i32> @knownbits_umax_shuffle_ashr(<4 x i32> %a0) {
; X32-LABEL: knownbits_umax_shuffle_ashr:
; X32: # %bb.0:
-; X32-NEXT: vpmaxud {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
+; X32-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: knownbits_umax_shuffle_ashr:
; X64: # %bb.0:
-; X64-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
-; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
+; X64-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
; X64-NEXT: retq
%1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
Modified: llvm/trunk/test/CodeGen/X86/shrink_vmul-widen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shrink_vmul-widen.ll?rev=349466&r1=349465&r2=349466&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shrink_vmul-widen.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shrink_vmul-widen.ll Tue Dec 18 01:33:25 2018
@@ -2254,11 +2254,9 @@ define void @PR34947(<9 x i16>* %p0, <9
; X86-AVX1-NEXT: vpinsrd $3, {{[-0-9]+}}(%e{{[sb]}}p), %xmm1, %xmm1 # 4-byte Folded Reload
; X86-AVX1-NEXT: vmovd {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 # 4-byte Folded Reload
; X86-AVX1-NEXT: # xmm2 = mem[0],zero,zero,zero
-; X86-AVX1-NEXT: movl $8199, %eax # imm = 0x2007
-; X86-AVX1-NEXT: vmovd %eax, %xmm3
-; X86-AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [8199,8199,8199,8199]
-; X86-AVX1-NEXT: vpmulld %xmm4, %xmm0, %xmm0
-; X86-AVX1-NEXT: vpmulld %xmm4, %xmm1, %xmm1
+; X86-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [8199,8199,8199,8199]
+; X86-AVX1-NEXT: vpmulld %xmm3, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpmulld %xmm3, %xmm1, %xmm1
; X86-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X86-AVX1-NEXT: vpmulld %xmm3, %xmm2, %xmm1
; X86-AVX1-NEXT: vmovd %xmm1, (%eax)
@@ -2331,8 +2329,6 @@ define void @PR34947(<9 x i16>* %p0, <9
; X86-AVX2-NEXT: vmovd %edx, %xmm0
; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [8199,8199,8199,8199,8199,8199,8199,8199]
; X86-AVX2-NEXT: vpmulld %ymm2, %ymm1, %ymm1
-; X86-AVX2-NEXT: movl $8199, %eax # imm = 0x2007
-; X86-AVX2-NEXT: vmovd %eax, %xmm2
; X86-AVX2-NEXT: vpmulld %xmm2, %xmm0, %xmm0
; X86-AVX2-NEXT: vmovd %xmm0, (%eax)
; X86-AVX2-NEXT: vmovdqa %ymm1, (%eax)
@@ -2497,12 +2493,10 @@ define void @PR34947(<9 x i16>* %p0, <9
; X64-AVX1-NEXT: vpinsrd $1, %r11d, %xmm2, %xmm2
; X64-AVX1-NEXT: vpinsrd $2, %r10d, %xmm2, %xmm2
; X64-AVX1-NEXT: vpinsrd $3, %r9d, %xmm2, %xmm2
+; X64-AVX1-NEXT: vpmulld %xmm1, %xmm2, %xmm2
+; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
+; X64-AVX1-NEXT: vmovd %r8d, %xmm2
; X64-AVX1-NEXT: vpmulld %xmm1, %xmm2, %xmm1
-; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
-; X64-AVX1-NEXT: vmovd %r8d, %xmm1
-; X64-AVX1-NEXT: movl $8199, %eax # imm = 0x2007
-; X64-AVX1-NEXT: vmovd %eax, %xmm2
-; X64-AVX1-NEXT: vpmulld %xmm2, %xmm1, %xmm1
; X64-AVX1-NEXT: vmovd %xmm1, (%rax)
; X64-AVX1-NEXT: vmovaps %ymm0, (%rax)
; X64-AVX1-NEXT: popq %rbx
@@ -2566,8 +2560,6 @@ define void @PR34947(<9 x i16>* %p0, <9
; X64-AVX2-NEXT: vmovd %edx, %xmm0
; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [8199,8199,8199,8199,8199,8199,8199,8199]
; X64-AVX2-NEXT: vpmulld %ymm2, %ymm1, %ymm1
-; X64-AVX2-NEXT: movl $8199, %eax # imm = 0x2007
-; X64-AVX2-NEXT: vmovd %eax, %xmm2
; X64-AVX2-NEXT: vpmulld %xmm2, %xmm0, %xmm0
; X64-AVX2-NEXT: vmovd %xmm0, (%rax)
; X64-AVX2-NEXT: vmovdqa %ymm1, (%rax)
Modified: llvm/trunk/test/CodeGen/X86/shrink_vmul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shrink_vmul.ll?rev=349466&r1=349465&r2=349466&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shrink_vmul.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shrink_vmul.ll Tue Dec 18 01:33:25 2018
@@ -2245,11 +2245,9 @@ define void @PR34947(<9 x i16>* %p0, <9
; X86-AVX1-NEXT: vpinsrd $3, {{[-0-9]+}}(%e{{[sb]}}p), %xmm1, %xmm1 # 4-byte Folded Reload
; X86-AVX1-NEXT: vmovd {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 # 4-byte Folded Reload
; X86-AVX1-NEXT: # xmm2 = mem[0],zero,zero,zero
-; X86-AVX1-NEXT: movl $8199, %eax # imm = 0x2007
-; X86-AVX1-NEXT: vmovd %eax, %xmm3
-; X86-AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [8199,8199,8199,8199]
-; X86-AVX1-NEXT: vpmulld %xmm4, %xmm0, %xmm0
-; X86-AVX1-NEXT: vpmulld %xmm4, %xmm1, %xmm1
+; X86-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [8199,8199,8199,8199]
+; X86-AVX1-NEXT: vpmulld %xmm3, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpmulld %xmm3, %xmm1, %xmm1
; X86-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X86-AVX1-NEXT: vpmulld %xmm3, %xmm2, %xmm1
; X86-AVX1-NEXT: vmovd %xmm1, (%eax)
@@ -2322,8 +2320,6 @@ define void @PR34947(<9 x i16>* %p0, <9
; X86-AVX2-NEXT: vmovd %edx, %xmm0
; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [8199,8199,8199,8199,8199,8199,8199,8199]
; X86-AVX2-NEXT: vpmulld %ymm2, %ymm1, %ymm1
-; X86-AVX2-NEXT: movl $8199, %eax # imm = 0x2007
-; X86-AVX2-NEXT: vmovd %eax, %xmm2
; X86-AVX2-NEXT: vpmulld %xmm2, %xmm0, %xmm0
; X86-AVX2-NEXT: vmovd %xmm0, (%eax)
; X86-AVX2-NEXT: vmovdqa %ymm1, (%eax)
@@ -2488,12 +2484,10 @@ define void @PR34947(<9 x i16>* %p0, <9
; X64-AVX1-NEXT: vpinsrd $1, %r11d, %xmm2, %xmm2
; X64-AVX1-NEXT: vpinsrd $2, %r10d, %xmm2, %xmm2
; X64-AVX1-NEXT: vpinsrd $3, %r9d, %xmm2, %xmm2
+; X64-AVX1-NEXT: vpmulld %xmm1, %xmm2, %xmm2
+; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
+; X64-AVX1-NEXT: vmovd %r8d, %xmm2
; X64-AVX1-NEXT: vpmulld %xmm1, %xmm2, %xmm1
-; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
-; X64-AVX1-NEXT: vmovd %r8d, %xmm1
-; X64-AVX1-NEXT: movl $8199, %eax # imm = 0x2007
-; X64-AVX1-NEXT: vmovd %eax, %xmm2
-; X64-AVX1-NEXT: vpmulld %xmm2, %xmm1, %xmm1
; X64-AVX1-NEXT: vmovd %xmm1, (%rax)
; X64-AVX1-NEXT: vmovaps %ymm0, (%rax)
; X64-AVX1-NEXT: popq %rbx
@@ -2557,8 +2551,6 @@ define void @PR34947(<9 x i16>* %p0, <9
; X64-AVX2-NEXT: vmovd %edx, %xmm0
; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [8199,8199,8199,8199,8199,8199,8199,8199]
; X64-AVX2-NEXT: vpmulld %ymm2, %ymm1, %ymm1
-; X64-AVX2-NEXT: movl $8199, %eax # imm = 0x2007
-; X64-AVX2-NEXT: vmovd %eax, %xmm2
; X64-AVX2-NEXT: vpmulld %xmm2, %xmm0, %xmm0
; X64-AVX2-NEXT: vmovd %xmm0, (%rax)
; X64-AVX2-NEXT: vmovdqa %ymm1, (%rax)
More information about the llvm-commits
mailing list