[llvm] r349400 - [X86][SSE] Split SimplifyDemandedBitsForTargetNode X86ISD::VSRLI/VSRAI handling.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 17 13:36:17 PST 2018
Author: rksimon
Date: Mon Dec 17 13:36:17 2018
New Revision: 349400
URL: http://llvm.org/viewvc/llvm-project?rev=349400&view=rev
Log:
[X86][SSE] Split SimplifyDemandedBitsForTargetNode X86ISD::VSRLI/VSRAI handling.
First step towards adding more capable combines to fix comments in D55768.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=349400&r1=349399&r2=349400&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Dec 17 13:36:17 2018
@@ -32410,7 +32410,6 @@ bool X86TargetLowering::SimplifyDemanded
}
break;
}
- case X86ISD::VSRAI:
case X86ISD::VSRLI: {
if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
if (ShiftImm->getAPIntValue().uge(BitWidth))
@@ -32420,10 +32419,24 @@ bool X86TargetLowering::SimplifyDemanded
unsigned ShAmt = ShiftImm->getZExtValue();
APInt DemandedMask = OriginalDemandedBits << ShAmt;
+ if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask,
+ OriginalDemandedElts, KnownOp, TLO, Depth + 1))
+ return true;
+ }
+ break;
+ }
+ case X86ISD::VSRAI: {
+ if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ if (ShiftImm->getAPIntValue().uge(BitWidth))
+ break;
+
+ KnownBits KnownOp;
+ unsigned ShAmt = ShiftImm->getZExtValue();
+ APInt DemandedMask = OriginalDemandedBits << ShAmt;
+
// If any of the demanded bits are produced by the sign extension, we also
// demand the input sign bit.
- if (Opc == X86ISD::VSRAI &&
- OriginalDemandedBits.countLeadingZeros() < ShAmt)
+ if (OriginalDemandedBits.countLeadingZeros() < ShAmt)
DemandedMask.setSignBit();
if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask,
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