[PATCH] D55744: [InstCombine] don't widen an arbitrary sequence of vector ops (PR40032)

[Sanjay Patel via Phabricator via llvm-commits]

spatel marked 2 inline comments as done.
spatel added inline comments.


================
Comment at: lib/Transforms/InstCombine/InstCombineCasts.cpp:1117
   unsigned BitsToClear;
-  if ((DestTy->isVectorTy() || shouldChangeType(SrcTy, DestTy)) &&
+  if (!DestTy->isVectorTy() && shouldChangeType(SrcTy, DestTy) &&
       canEvaluateZExtd(Src, DestTy, BitsToClear, *this, &CI)) {
----------------
RKSimon wrote:
> What about putting !DestTy->isVectorTy() inside InstCombiner::shouldChangeType ?
Yes, that's cleaner - currently we just assert that we have scalar inside there.


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  https://reviews.llvm.org/D55744/new/

https://reviews.llvm.org/D55744