[llvm] r349314 - [X86] Autogenerate complete checks. NFC

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sun Dec 16 10:35:54 2018
New Revision: 349314

URL: http://llvm.org/viewvc/llvm-project?rev=349314&view=rev
Log:
[X86] Autogenerate complete checks. NFC

Modified:
    llvm/trunk/test/CodeGen/X86/fold-load.ll

Modified: llvm/trunk/test/CodeGen/X86/fold-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-load.ll?rev=349314&r1=349313&r2=349314&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-load.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-load.ll Sun Dec 16 10:35:54 2018
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
 	%struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
 	%struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 }
@@ -5,6 +6,17 @@
 
 ; This should just not crash.
 define void @test1() nounwind {
+; CHECK-LABEL: test1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    testb $1, stmt_obstack+40
+; CHECK-NEXT:    jne .LBB0_1
+; CHECK-NEXT:  # %bb.2: # %cond_false30.i
+; CHECK-NEXT:    pushl $0
+; CHECK-NEXT:    calll 0
+; CHECK-NEXT:    addl $4, %esp
+; CHECK-NEXT:    retl
+; CHECK-NEXT:  .LBB0_1: # %cond_true23.i
+; CHECK-NEXT:    retl
 entry:
 	br i1 true, label %cond_true, label %cond_next
 
@@ -30,6 +42,14 @@ cond_next:		; preds = %entry
 
 
 define i32 @test2(i16* %P, i16* %Q) nounwind {
+; CHECK-LABEL: test2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movzwl (%eax), %edx
+; CHECK-NEXT:    movzbl %dl, %eax
+; CHECK-NEXT:    movw %dx, (%ecx)
+; CHECK-NEXT:    retl
   %A = load i16, i16* %P, align 4                      ; <i16> [#uses=11]
   %C = zext i16 %A to i32                         ; <i32> [#uses=1]
   %D = and i32 %C, 255                            ; <i32> [#uses=1]
@@ -39,9 +59,6 @@ L:
   store i16 %A, i16* %Q
   ret i32 %D
 
-; CHECK-LABEL: test2:
-; CHECK: 	movl	4(%esp), %eax
-; CHECK-NEXT:	movzwl	(%eax), %e{{..}}
 
 }
 
@@ -49,10 +66,22 @@ L:
 ; xor in exit block will be CSE'ed and load will be folded to xor in entry.
 define i1 @test3(i32* %P, i32* %Q) nounwind {
 ; CHECK-LABEL: test3:
-; CHECK: movl 8(%esp), %e
-; CHECK: movl 4(%esp), %e
-; CHECK: xorl (%e
-; CHECK: j
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movl (%eax), %eax
+; CHECK-NEXT:    xorl (%ecx), %eax
+; CHECK-NEXT:    testl $89947, %eax # imm = 0x15F5B
+; CHECK-NEXT:    je .LBB2_2
+; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retl
+; CHECK-NEXT:  .LBB2_2: # %exit
+; CHECK-NEXT:    testl $-838178173, %eax # imm = 0xCE0A6A83
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retl
 entry:
   %0 = load i32, i32* %P, align 4
   %1 = load i32, i32* %Q, align 4