[PATCH] D55744: [InstCombine] don't widen an arbitrary sequence of vector ops (PR40032)

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: efriedma, craig.topper, RKSimon.
Herald added subscribers: kristof.beyls, javed.absar, mcrosier.

The problem is shown specifically for a case with vector multiply here:
https://bugs.llvm.org/show_bug.cgi?id=40032
...and this might mask the original backend bug for ARM shown in:
https://bugs.llvm.org/show_bug.cgi?id=39967

As the test diffs here show, we were (and probably still aren't) doing these kinds of transforms in a principled way. We are producing more or equal wide instructions than we started with in some cases, so we still need to restrict/correct other transforms from overstepping.

If there are perf regressions from this change, we can either carve out exceptions to the general IR rules, or improve the backend to do these transforms when we know the transform is profitable. That's probably similar to a change I just made in D55448 <https://reviews.llvm.org/D55448>.


https://reviews.llvm.org/D55744

Files:
  lib/Transforms/InstCombine/InstCombineCasts.cpp
  test/Transforms/InstCombine/cast.ll
  test/Transforms/InstCombine/select-bitext.ll
  test/Transforms/InstCombine/vector-casts.ll

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