[llvm] r349297 - [X86] Add computeKnownBits tests for funnel shift intrinsics

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sun Dec 16 04:15:31 2018
New Revision: 349297

URL: http://llvm.org/viewvc/llvm-project?rev=349297&view=rev
Log:
[X86] Add computeKnownBits tests for funnel shift intrinsics

Modified:
    llvm/trunk/test/CodeGen/X86/known-bits.ll

Modified: llvm/trunk/test/CodeGen/X86/known-bits.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/known-bits.ll?rev=349297&r1=349296&r2=349297&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/known-bits.ll (original)
+++ llvm/trunk/test/CodeGen/X86/known-bits.ll Sun Dec 16 04:15:31 2018
@@ -298,3 +298,46 @@ declare {i64, i1} @llvm.uadd.with.overfl
 declare {i64, i1} @llvm.sadd.with.overflow.i64(i64, i64) nounwind readnone
 declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone
 declare {i64, i1} @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone
+
+define i32 @knownbits_fshl(i32 %a0) nounwind {
+; X32-LABEL: knownbits_fshl:
+; X32:       # %bb.0:
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl $-1, %eax
+; X32-NEXT:    shrdl $27, %ecx, %eax
+; X32-NEXT:    andl $3, %eax
+; X32-NEXT:    retl
+;
+; X64-LABEL: knownbits_fshl:
+; X64:       # %bb.0:
+; X64-NEXT:    movl $-1, %eax
+; X64-NEXT:    shrdl $27, %edi, %eax
+; X64-NEXT:    andl $3, %eax
+; X64-NEXT:    retq
+  %1 = tail call i32 @llvm.fshl.i32(i32 %a0, i32 -1, i32 5)
+  %2 = and i32 %1, 3
+  ret i32 %2
+}
+
+define i32 @knownbits_fshr(i32 %a0) nounwind {
+; X32-LABEL: knownbits_fshr:
+; X32:       # %bb.0:
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl $-1, %eax
+; X32-NEXT:    shrdl $5, %ecx, %eax
+; X32-NEXT:    andl $3, %eax
+; X32-NEXT:    retl
+;
+; X64-LABEL: knownbits_fshr:
+; X64:       # %bb.0:
+; X64-NEXT:    movl $-1, %eax
+; X64-NEXT:    shrdl $5, %edi, %eax
+; X64-NEXT:    andl $3, %eax
+; X64-NEXT:    retq
+  %1 = tail call i32 @llvm.fshr.i32(i32 %a0, i32 -1, i32 5)
+  %2 = and i32 %1, 3
+  ret i32 %2
+}
+
+declare i32 @llvm.fshl.i32(i32, i32, i32) nounwind readnone
+declare i32 @llvm.fshr.i32(i32, i32, i32) nounwind readnone