[llvm] r349091 - [AArch64] Fix Exynos predicates (NFC)

[Evandro Menezes via llvm-commits]

Author: evandro
Date: Thu Dec 13 15:19:46 2018
New Revision: 349091

URL: http://llvm.org/viewvc/llvm-project?rev=349091&view=rev
Log:
[AArch64] Fix Exynos predicates (NFC)

Fix the logic in the definition of the `ExynosShiftExPred` as a more
specific version of `ExynosShiftPred`.  But, since `ExynosShiftExPred` is
not used yet, this change has NFC.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td

Modified: llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td?rev=349091&r1=349090&r2=349091&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SchedPredExynos.td Thu Dec 13 15:19:46 2018
@@ -12,6 +12,19 @@
 //
 //===----------------------------------------------------------------------===//
 
+// Auxiliary predicates.
+
+// Check the shift in arithmetic and logic instructions.
+def ExynosCheckShift : CheckAny<[CheckShiftBy0,
+                                 CheckAll<
+                                   [CheckShiftLSL,
+                                    CheckAny<
+                                      [CheckShiftBy1,
+                                       CheckShiftBy2,
+                                       CheckShiftBy3]>]>]>;
+
+// Exynos predicates.
+
 // Identify BLR specifying the LR register as the indirect target register.
 def ExynosBranchLinkLRPred : MCSchedPredicate<
                                CheckAll<[CheckOpcode<[BLR]>,
@@ -82,36 +95,32 @@ def ExynosRotateRightImmPred : MCSchedPr
                                  CheckAll<[CheckOpcode<[EXTRWrri, EXTRXrri]>,
                                            CheckSameRegOperand<1, 2>]>>;
 
-// Identify arithmetic and logic instructions without or with limited shift.
+// Identify arithmetic and logic instructions with limited shift.
 def ExynosShiftFn   : TIIPredicate<
                         "isExynosShiftFast",
                         MCOpcodeSwitchStatement<
                           [MCOpcodeSwitchCase<
                              IsArithLogicShiftOp.ValidOpcodes,
-                             MCReturnStatement<
-                               CheckAny<[CheckShiftBy0,
-                                         CheckAll<
-                                           [CheckShiftLSL,
-                                            CheckAny<
-                                              [CheckShiftBy1,
-                                               CheckShiftBy2,
-                                               CheckShiftBy3]>]>]>>>],
+                             MCReturnStatement<ExynosCheckShift>>],
                           MCReturnStatement<FalsePred>>>;
 def ExynosShiftPred : MCSchedPredicate<ExynosShiftFn>;
 
-// Identify more arithmetic and logic instructions without or limited shift.
+// Identify more arithmetic and logic instructions with limited shift.
 def ExynosShiftExFn   : TIIPredicate<
                           "isExynosShiftExFast",
                           MCOpcodeSwitchStatement<
                             [MCOpcodeSwitchCase<
                                IsArithLogicShiftOp.ValidOpcodes,
                                MCReturnStatement<
-                                 CheckAll<
-                                   [CheckShiftLSL,
-                                    CheckShiftBy8]>>>],
-                            MCReturnStatement<ExynosShiftFn>>>;
+                                 CheckAny<
+                                   [CheckAll<
+                                     [CheckShiftLSL,
+                                      CheckShiftBy8]>,
+                                    ExynosCheckShift]>>>],
+                            MCReturnStatement<FalsePred>>>;
 def ExynosShiftExPred : MCSchedPredicate<ExynosShiftExFn>;
 
+
 // Identify arithmetic and logic immediate instructions.
 def ExynosCheapFn : TIIPredicate<
                       "isExynosCheapAsMove",