[llvm] r349028 - [DAGCombine] Moved X86 rotate_amount % bitwidth == 0 early out to DAGCombiner

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Thu Dec 13 04:23:32 2018
New Revision: 349028

URL: http://llvm.org/viewvc/llvm-project?rev=349028&view=rev
Log:
[DAGCombine] Moved X86 rotate_amount % bitwidth == 0 early out to DAGCombiner

Remove common code from custom lowering (code is still safe if somehow a zero value gets used).

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=349028&r1=349027&r2=349028&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Dec 13 04:23:32 2018
@@ -6314,6 +6314,13 @@ SDValue DAGCombiner::visitRotate(SDNode
   if (isNullOrNullSplat(N1))
     return N0;
 
+  // fold (rot x, c) -> x iff (c % BitSize) == 0
+  if (isPowerOf2_32(Bitsize) && Bitsize > 1) {
+    APInt ModuloMask(N1.getScalarValueSizeInBits(), Bitsize - 1);
+    if (DAG.MaskedValueIsZero(N1, ModuloMask))
+      return N0;
+  }
+
   // fold (rot x, c) -> (rot x, c % BitSize)
   if (ConstantSDNode *Cst = isConstOrConstSplat(N1)) {
     if (Cst->getAPIntValue().uge(Bitsize)) {

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=349028&r1=349027&r2=349028&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 13 04:23:32 2018
@@ -24793,9 +24793,6 @@ static SDValue LowerRotate(SDValue Op, c
     if (auto *BVAmt = dyn_cast<BuildVectorSDNode>(Amt)) {
       if (auto *RotateConst = BVAmt->getConstantSplatNode()) {
         uint64_t RotateAmt = RotateConst->getAPIntValue().urem(EltSizeInBits);
-        if (RotateAmt == 0)
-          return R;
-
         return DAG.getNode(X86ISD::VROTLI, DL, VT, R,
                            DAG.getConstant(RotateAmt, DL, MVT::i8));
       }
@@ -24816,12 +24813,8 @@ static SDValue LowerRotate(SDValue Op, c
 
   // Rotate by an uniform constant - expand back to shifts.
   if (auto *BVAmt = dyn_cast<BuildVectorSDNode>(Amt))
-    if (auto *RotateConst = BVAmt->getConstantSplatNode()) {
-      uint64_t RotateAmt = RotateConst->getAPIntValue().urem(EltSizeInBits);
-      if (RotateAmt == 0)
-        return R;
+    if (BVAmt->getConstantSplatNode())
       return SDValue();
-    }
 
   // TODO: ISD::ROT* uses modulo rotate amounts, we need to handle this.