[llvm] r348972 - [X86] Move stack folding test for MULX to a MIR test. Add a MULX32 case as well
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 12 12:50:24 PST 2018
Author: ctopper
Date: Wed Dec 12 12:50:24 2018
New Revision: 348972
URL: http://llvm.org/viewvc/llvm-project?rev=348972&view=rev
Log:
[X86] Move stack folding test for MULX to a MIR test. Add a MULX32 case as well
A future patch may stop using MULX by default so use MIR to ensure we're always testing MULX.
Add the 32-bit case that we couldn't do in the 64-bit mode IR test due to it being promoted to a 64-bit mul.
Added:
llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.mir
Modified:
llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.ll
Modified: llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.ll?rev=348972&r1=348971&r2=348972&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.ll Wed Dec 12 12:50:24 2018
@@ -26,20 +26,6 @@ define i64 @stack_fold_bzhi_u64(i64 %a0,
}
declare i64 @llvm.x86.bmi.bzhi.64(i64, i64)
-define i64 @stack_fold_mulx_u64(i64 %a0, i64 %a1, i64 *%a2) {
- ;CHECK-LABEL: stack_fold_mulx_u64
- ;CHECK: mulxq {{-?[0-9]*}}(%rsp), %rax, %rcx {{.*#+}} 8-byte Folded Reload
- %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
- %2 = zext i64 %a0 to i128
- %3 = zext i64 %a1 to i128
- %4 = mul i128 %2, %3
- %5 = lshr i128 %4, 64
- %6 = trunc i128 %4 to i64
- %7 = trunc i128 %5 to i64
- store i64 %7, i64 *%a2
- ret i64 %6
-}
-
define i32 @stack_fold_pdep_u32(i32 %a0, i32 %a1) {
;CHECK-LABEL: stack_fold_pdep_u32
;CHECK: pdepl {{-?[0-9]*}}(%rsp), %eax, %eax {{.*#+}} 4-byte Folded Reload
Added: llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.mir?rev=348972&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.mir (added)
+++ llvm/trunk/test/CodeGen/X86/stack-folding-bmi2.mir Wed Dec 12 12:50:24 2018
@@ -0,0 +1,103 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -o - -mtriple=x86_64-- -run-pass=greedy %s | FileCheck %s
+# Tests for stack folding MULX. Doing this as a MIR test to ensure MULX is used and not legacy MUL.
+--- |
+ ; Function Attrs: nounwind
+ define i32 @stack_fold_mulx_u32(i32 %a0, i32 %a1) #0 {
+ %1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
+ %2 = zext i32 %a0 to i128
+ %3 = zext i32 %a1 to i128
+ %4 = mul i128 %2, %3
+ %5 = lshr i128 %4, 32
+ %6 = trunc i128 %5 to i32
+ ret i32 %6
+ }
+
+ ; Function Attrs: nounwind
+ define i64 @stack_fold_mulx_u64(i64 %a0, i64 %a1) #0 {
+ %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
+ %2 = zext i64 %a0 to i128
+ %3 = zext i64 %a1 to i128
+ %4 = mul i128 %2, %3
+ %5 = lshr i128 %4, 64
+ %6 = trunc i128 %5 to i64
+ ret i64 %6
+ }
+
+ ; Function Attrs: nounwind
+ declare void @llvm.stackprotector(i8*, i8**) #1
+
+ attributes #0 = { nounwind "target-features"="+bmi2" }
+ attributes #1 = { nounwind }
+
+...
+---
+name: stack_fold_mulx_u32
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gr32 }
+ - { id: 1, class: gr32 }
+ - { id: 2, class: fr64 }
+ - { id: 3, class: gr32 }
+ - { id: 4, class: gr32 }
+liveins:
+ - { reg: '$edi', virtual-reg: '%0' }
+ - { reg: '$esi', virtual-reg: '%1' }
+body: |
+ bb.0 (%ir-block.0):
+ liveins: $edi, $esi
+
+ ; CHECK-LABEL: name: stack_fold_mulx_u32
+ ; CHECK: liveins: $edi, $esi
+ ; CHECK: MOV32mr %stack.0, 1, $noreg, 0, $noreg, $esi :: (store 4 into %stack.0)
+ ; CHECK: MOV32mr %stack.1, 1, $noreg, 0, $noreg, $edi :: (store 4 into %stack.1)
+ ; CHECK: INLINEASM &nop, 1, 4063242, def dead %2, 12, implicit-def dead early-clobber $rax, 12, implicit-def dead early-clobber $rbx, 12, implicit-def dead early-clobber $rcx, 12, implicit-def dead early-clobber $rdx, 12, implicit-def dead early-clobber $rsi, 12, implicit-def dead early-clobber $rdi, 12, implicit-def dead early-clobber $rbp, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15
+ ; CHECK: $edx = MOV32rm %stack.1, 1, $noreg, 0, $noreg :: (load 4 from %stack.1)
+ ; CHECK: %3:gr32, dead %4:gr32 = MULX32rm %stack.0, 1, $noreg, 0, $noreg, implicit $edx :: (load 4 from %stack.0)
+ ; CHECK: $eax = COPY %3
+ ; CHECK: RET 0, $eax
+ %1:gr32 = COPY $esi
+ %0:gr32 = COPY $edi
+ INLINEASM &nop, 1, 4063242, def dead %2, 12, implicit-def dead early-clobber $rax, 12, implicit-def dead early-clobber $rbx, 12, implicit-def dead early-clobber $rcx, 12, implicit-def dead early-clobber $rdx, 12, implicit-def dead early-clobber $rsi, 12, implicit-def dead early-clobber $rdi, 12, implicit-def dead early-clobber $rbp, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15
+ $edx = COPY %0
+ %3:gr32, dead %4:gr32 = MULX32rr %1, implicit killed $edx
+ $eax = COPY %3
+ RET 0, killed $eax
+
+...
+---
+name: stack_fold_mulx_u64
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gr64 }
+ - { id: 1, class: gr64 }
+ - { id: 2, class: fr64 }
+ - { id: 3, class: gr64 }
+ - { id: 4, class: gr64 }
+liveins:
+ - { reg: '$rdi', virtual-reg: '%0' }
+ - { reg: '$rsi', virtual-reg: '%1' }
+body: |
+ bb.0 (%ir-block.0):
+ liveins: $rdi, $rsi
+
+ ; CHECK-LABEL: name: stack_fold_mulx_u64
+ ; CHECK: liveins: $rdi, $rsi
+ ; CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $rsi :: (store 8 into %stack.0)
+ ; CHECK: MOV64mr %stack.1, 1, $noreg, 0, $noreg, $rdi :: (store 8 into %stack.1)
+ ; CHECK: INLINEASM &nop, 1, 4063242, def dead %2, 12, implicit-def dead early-clobber $rax, 12, implicit-def dead early-clobber $rbx, 12, implicit-def dead early-clobber $rcx, 12, implicit-def dead early-clobber $rdx, 12, implicit-def dead early-clobber $rsi, 12, implicit-def dead early-clobber $rdi, 12, implicit-def dead early-clobber $rbp, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15
+ ; CHECK: $rdx = MOV64rm %stack.1, 1, $noreg, 0, $noreg :: (load 8 from %stack.1)
+ ; CHECK: %3:gr64, dead %4:gr64 = MULX64rm %stack.0, 1, $noreg, 0, $noreg, implicit $rdx :: (load 8 from %stack.0)
+ ; CHECK: $rax = COPY %3
+ ; CHECK: RET 0, $rax
+ %1:gr64 = COPY $rsi
+ %0:gr64 = COPY $rdi
+ INLINEASM &nop, 1, 4063242, def dead %2, 12, implicit-def dead early-clobber $rax, 12, implicit-def dead early-clobber $rbx, 12, implicit-def dead early-clobber $rcx, 12, implicit-def dead early-clobber $rdx, 12, implicit-def dead early-clobber $rsi, 12, implicit-def dead early-clobber $rdi, 12, implicit-def dead early-clobber $rbp, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15
+ $rdx = COPY %0
+ %3:gr64, dead %4:gr64 = MULX64rr %1, implicit killed $rdx
+ $rax = COPY %3
+ RET 0, killed $rax
+
+...
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