[PATCH] D55498: [PPC64] Support R_PPC64_GOT16 Relocations

[Martell Malone via Phabricator via llvm-commits]

martell marked 5 inline comments as done.
martell added a comment.

I'm probably going to learn something valuable about the global offsets table or the table of contents sections from the response to this :)



================
Comment at: ELF/Arch/PPC64.cpp:23
 
 static uint64_t PPC64TocOffset = 0x8000;
 static uint64_t DynamicThreadPointerOffset = 0x8000;
----------------
Any suggestions on a rename here?
(It is no longer just toc but is got also)


================
Comment at: ELF/Arch/PPC64.cpp:63
 
 uint64_t elf::getPPC64TocBase() {
   // The TOC consists of sections .got, .toc, .tocbss, .plt in that order. The
----------------
Ditto


================
Comment at: ELF/Arch/PPC64.cpp:530
   // Relocations relative to the toc-base need to be adjusted by the Toc offset.
   uint64_t TocBiasedVal = Val - PPC64TocOffset;
   // Relocations relative to dtv[dtpmod] need to be adjusted by the DTP offset.
----------------
ditto


================
Comment at: ELF/Arch/PPC64.cpp:600
 
 static bool isTocRelType(RelType Type) {
   return Type == R_PPC64_TOC16_HA || Type == R_PPC64_TOC16_LO_DS ||
----------------
I don't think I can just optimize got relocations like toc relocations
but I'm not as familiar with the ISA / symbol groups as others.
Is a `--got-optimize` useful?

Take `R_PPC64_ADDR16_HA`  for `R_PPC64_GOT16_HA` as an example

```
case R_PPC64_ADDR16_HA:
    if (Config->GotOptimize && IsGotRelType && ha(Val) == 0)
      writeInstrFromHalf16(Loc, 0x60000000);
    else
      write16(Loc, ha(Val));
    break;
```


================
Comment at: ELF/Arch/PPC64.cpp:606
 void PPC64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
   // For a TOC-relative relocation, proceed in terms of the corresponding
   // ADDR16 relocation type.
----------------
comments probably need to change


Repository:
  rLLD LLVM Linker

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  https://reviews.llvm.org/D55498/new/

https://reviews.llvm.org/D55498