[PATCH] D55464: [SelectionDAG] Remove SUBC handling from computeKnownBits

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, efriedma, deadalnix.

The code that computes the known bits wasn't taking into account the possibility of an incoming carry. So I don't think this code was valid. Certainly not the code that assumed the number of low zero bits in each input determined the low zero bits of the output.

I found this purely by inspection so I don't have a test case.


https://reviews.llvm.org/D55464

Files:
  lib/CodeGen/SelectionDAG/SelectionDAG.cpp


Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2712,8 +2712,7 @@
       break;
     }
     LLVM_FALLTHROUGH;
-  case ISD::SUB:
-  case ISD::SUBC: {
+  case ISD::SUB: {
     if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0))) {
       // We know that the top bits of C-X are clear if X contains less bits
       // than C (i.e. no wrap-around can happen).  For example, 20-X is


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