[PATCH] D55460: APFloat: allow 64-bit of payload
JF Bastien via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 7 16:01:19 PST 2018
jfb added a comment.
In D55460#1324136 <https://reviews.llvm.org/D55460#1324136>, @rjmccall wrote:
> This truncates the payload to fit into the significand field. Presumably that includes setting the top bit of the significand to make this a NaN and not an infinity. Does it also always form a qNaN, or can you create an sNaN this way?
Someone wrote a test for this! http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/APFloatTest.cpp?r1=97364&r2=97363&pathrev=97364
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https://reviews.llvm.org/D55460/new/
https://reviews.llvm.org/D55460
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