[PATCH] D55444: AMDGPU: Fix DPP combiner

[Valery Pykhtin via Phabricator via llvm-commits]

vpykhtin created this revision.
vpykhtin added reviewers: cwabbott, arsenm.
vpykhtin added a project: AMDGPU.
Herald added subscribers: llvm-commits, kbarton, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, nemanjai, kzhuravl.

Fix issues discussed after https://reviews.llvm.org/D55314

1. dpp move with uses and old reg initializer should be in the same BB.

2. bound_ctrl:0 is only considered when bank_mask and row_mask are fully enabled (0xF). Othervise the old register value is checked for identity.

3. Added add, subrev, and, or instructions to the old folding function.

4. Kill flag is cleared for the src0 (DPP register) as it may be copied into more than one user.

Tests are updated.

The pass is still disabled by default, I would be appreciate if someone could test it on RADV (being turned on).


Repository:
  rL LLVM

https://reviews.llvm.org/D55444

Files:
  lib/Target/AMDGPU/GCNDPPCombine.cpp
  test/CodeGen/AMDGPU/dpp_combine.ll
  test/CodeGen/AMDGPU/dpp_combine_subregs.mir

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