[PATCH] D55342: [RISCV, WIP] Support assembling %tls_{ie, gd}_pcrel_hi modifiers

[James Clarke via Phabricator via llvm-commits]

jrtc27 requested changes to this revision.
jrtc27 added a comment.
This revision now requires changes to proceed.

Please also add some tests to `relocations.s` like I have done for `%got_pcrel_hi`.



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Comment at: lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h:84
       { "fixup_riscv_got_hi20",     12,     20,  MCFixupKindInfo::FKF_IsPCRel },
+      { "fixup_riscv_tls_ie_hi20",  12,     20,  MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_riscv_tprel_hi20",   12,     20,  0 },
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This will need adding to `shouldForceRelocation` (along with the GD one) when you rebase. Also, is there a reason these two aren't next to each other (applies throughout the file; I'd try to keep them together and in a consistent order)?

I also wonder if we should call this one `fixup_riscv_tls_got_hi20` (and similarly `VK_RISCV_TLS_GOT_HI`) to match the relocation name like we do for all the other fixups. Otherwise, `tls_ie_hi20` is neither the assembly modifier (`%tls_ie_pcrel_hi`) nor the relocation, but a special hybrid.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55342/new/

https://reviews.llvm.org/D55342