[llvm] r348510 - [AArch64] Fix Exynos predicate
Evandro Menezes via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 6 10:25:37 PST 2018
Author: evandro
Date: Thu Dec 6 10:25:37 2018
New Revision: 348510
URL: http://llvm.org/viewvc/llvm-project?rev=348510&view=rev
Log:
[AArch64] Fix Exynos predicate
Fix predicate for arithmetic instructions with shift and/or extend.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=348510&r1=348509&r2=348510&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Thu Dec 6 10:25:37 2018
@@ -707,8 +707,8 @@ bool AArch64InstrInfo::isAsCheapAsAMove(
if (Subtarget.hasExynosCheapAsMoveHandling()) {
if (isExynosResetFast(MI) || isExynosShiftExtFast(MI))
return true;
- else
- return MI.isAsCheapAsAMove();
+
+ return MI.isAsCheapAsAMove();
}
// Finally, check generic cases.
@@ -897,7 +897,7 @@ bool AArch64InstrInfo::isExynosLdStExtFa
bool AArch64InstrInfo::isExynosShiftExtFast(const MachineInstr &MI) {
unsigned Imm, Shift;
- AArch64_AM::ShiftExtendType Ext;
+ AArch64_AM::ShiftExtendType Ext = AArch64_AM::UXTX;
switch (MI.getOpcode()) {
default:
@@ -947,20 +947,22 @@ bool AArch64InstrInfo::isExynosShiftExtF
// WriteIEReg
case AArch64::ADDSWrx:
case AArch64::ADDSXrx:
- case AArch64::ADDSXrx64:
case AArch64::ADDWrx:
case AArch64::ADDXrx:
- case AArch64::ADDXrx64:
case AArch64::SUBSWrx:
case AArch64::SUBSXrx:
- case AArch64::SUBSXrx64:
case AArch64::SUBWrx:
case AArch64::SUBXrx:
+ Ext = AArch64_AM::UXTW;
+ LLVM_FALLTHROUGH;
+ case AArch64::ADDSXrx64:
+ case AArch64::ADDXrx64:
+ case AArch64::SUBSXrx64:
case AArch64::SUBXrx64:
Imm = MI.getOperand(3).getImm();
Shift = AArch64_AM::getArithShiftValue(Imm);
- Ext = AArch64_AM::getArithExtendType(Imm);
- return (Shift == 0 || (Shift <= 3 && Ext == AArch64_AM::UXTX));
+ return (Shift == 0 ||
+ (Shift <= 3 && Ext == AArch64_AM::getArithExtendType(Imm)));
}
}
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