[PATCH] D55373: [LSR] Generate formulae to enable more post-incs

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: qcolombet, gilr, kparzysz.
Herald added subscribers: kristof.beyls, javed.absar.

Modify GenerateConstantOffsetsImpl to create offsets that can be used by post-increment addressing modes. If formulae can be generated which result in the constant offset being the same size as the recurrence, we can generate a post-inc for that access.

      

The resulting code, at least for Arm, is that the first access in the loop is post-indexed and the following operations use constant offsets from the update base. The Arm backend now returns that it shouldFavourPostInc for Thumb2 M-class cores.

@kparzysz Would you be able to provide feedback on how this effects Hexagon? It's a target that I don't build and I haven't looked at the tests, but I'm assuming this would interest you.


https://reviews.llvm.org/D55373

Files:
  lib/Target/ARM/ARMTargetTransformInfo.h
  lib/Transforms/Scalar/LoopStrengthReduce.cpp
  test/CodeGen/ARM/dsp-post-incs.ll
  test/CodeGen/ARM/loop-align-cortex-m.ll
  test/CodeGen/ARM/t2-shrink-ldrpost.ll
  test/Transforms/LoopStrengthReduce/ARM/complexity.ll

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