[PATCH] D55192: [PowerPC] VSX register support for inline assembly

Zhang Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 5 22:26:19 PST 2018


ZhangKang marked an inline comment as done.
ZhangKang added inline comments.


================
Comment at: clang/lib/Basic/Targets/PPC.cpp:416
+const TargetInfo::AddlRegName GCCAddlRegNames[] = {
+    {{"vs0"}, 0},   {{"vs1"}, 1},   {{"vs2"}, 2},   {{"vs3"}, 3}, 
+    {{"vs4"}, 4},   {{"vs5"}, 5},   {{"vs6"}, 6},   {{"vs7"}, 7},
----------------
ZhangKang wrote:
> ZhangKang wrote:
> > jsji wrote:
> > > RegNum is wrong here!
> > > "vs0" should be mapped to RegNum of "f0", which is 33. 
> > > "vs32" should be mapped to RegNum of "v0", which is 78.
> > I will learn it and check it, thanks for your point out my error.
> Here, the value of `AddlRegName` is responding to the gcc macro `ADDITIONAL_REGISTER_NAMES`. In the array `ADDITIONAL_REGISTER_NAMES`, `vs0~vs31` should be mapped to RegNum of `f0~f31`, which is `32~63`. And `vs32~vs63` should be mapped to RegNum of `v0~v31`, which is `77~108`.
Below is the  `ADDITIONAL_REGISTER_NAMES` GCC manual said:
```
Macro: ADDITIONAL_REGISTER_NAMES

    If defined, a C initializer for an array of structures containing a name and a register number. This macro defines additional names for hard registers, thus allowing the asm option in declarations to refer to registers using alternate names. 
```


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55192/new/

https://reviews.llvm.org/D55192





More information about the llvm-commits mailing list