[llvm] r348358 - [DAG] Add fshl/fshr tblgen opcodes

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Wed Dec  5 03:55:33 2018
New Revision: 348358

URL: http://llvm.org/viewvc/llvm-project?rev=348358&view=rev
Log:
[DAG] Add fshl/fshr tblgen opcodes

Missed off from https://reviews.llvm.org/D54698

Modified:
    llvm/trunk/include/llvm/Target/TargetSelectionDAG.td

Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=348358&r1=348357&r2=348358&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original)
+++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Wed Dec  5 03:55:33 2018
@@ -353,6 +353,8 @@ def sra        : SDNode<"ISD::SRA"
 def shl        : SDNode<"ISD::SHL"       , SDTIntShiftOp>;
 def rotl       : SDNode<"ISD::ROTL"      , SDTIntShiftOp>;
 def rotr       : SDNode<"ISD::ROTR"      , SDTIntShiftOp>;
+def fshl       : SDNode<"ISD::FSHL"      , SDTIntShiftDOp>;
+def fshr       : SDNode<"ISD::FSHR"      , SDTIntShiftDOp>;
 def and        : SDNode<"ISD::AND"       , SDTIntBinOp,
                         [SDNPCommutative, SDNPAssociative]>;
 def or         : SDNode<"ISD::OR"        , SDTIntBinOp,