[PATCH] D55009: [GVN] Don't perform scalar PRE on GEPs
John Brawn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 4 08:09:41 PST 2018
john.brawn added a comment.
The idea behind allowing Scalar PRE when the addressing mode isn't legal is for some thing like (adjusted from pre-gep-load.ll)
define void @foo(i32 %stat, i32 %i, double* %p, double* %q) {
entry:
switch i32 %stat, label %sw.default [
i32 0, label %sw.bb
i32 1, label %sw.bb
i32 2, label %sw.bb2
]
sw.bb: ; preds = %entry, %entry
%arrayidx1 = getelementptr inbounds double, double* %p, i64 1234567
store double 1.0, double* %arrayidx1, align 8
br i1 undef, label %if.then, label %if.end
if.then: ; preds = %sw.bb
br label %return
if.end: ; preds = %sw.bb
br label %sw.bb2
sw.bb2: ; preds = %if.end, %entry
%arrayidx5 = getelementptr inbounds double, double* %p, i64 1234567
store double 0.0, double* %arrayidx5, align 8
br label %return
sw.default: ; preds = %entry
br label %return
return: ; preds = %sw.default, %sw.bb2, %if.then
ret void
}
The offset in the gep is too big to use as an immediate offset in AArch64, so we'd like to not materialise the same constant twice to use as the offset, but doing PRE on the GEP means we get
mov w8, #46136
movk w8, #150, lsl #16
add x8, x2, x8
.LBB0_4: // %sw.bb2
str xzr, [x8]
but we really want
mov w8, #46136
movk w8, #150, lsl #16
.LBB0_4: // %sw.bb2
str xzr, [x2, x8]
i.e. we'd like to PRE the offset generation but not the add. So I think that side of things is better handled by some kind of MachinePRE, and for GVN it's fine to just refuse to do scalar PRE on GEPs (i.e. what this patch does).
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D55009/new/
https://reviews.llvm.org/D55009
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