[PATCH] D54205: [RISCV] Add support for the various RISC-V FMA instruction variants

[Luís Marques via Phabricator via llvm-commits]

luismarques updated this revision to Diff 176610.
luismarques added a comment.

Fixes the issues pointed out by Alex Bradbury.

Some of the existing tests on the touched test files were changed:

- Added nounwind attribute;
- Fixed use of tabs, replaced with two spaces.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54205/new/

https://reviews.llvm.org/D54205

Files:
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVInstrInfoD.td
  lib/Target/RISCV/RISCVInstrInfoF.td
  test/CodeGen/RISCV/alu32.ll
  test/CodeGen/RISCV/double-arith.ll
  test/CodeGen/RISCV/double-intrinsics.ll
  test/CodeGen/RISCV/float-arith.ll
  test/CodeGen/RISCV/float-intrinsics.ll

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