[PATCH] D55192: [PowerPC] VSX register support for inline assembly

Zhang Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 4 01:37:25 PST 2018


ZhangKang updated this revision to Diff 176560.
ZhangKang added a comment.

The old patch will rename from `vs32` to` v0` in clobber list, that‘s is not very reasonable.
The new patch will override `getGCCAddlRegNames` to map `vs*` to reg numbers, this can avoid unnecessary renaming from `vs32` to` v0` in clobber list.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55192/new/

https://reviews.llvm.org/D55192

Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/test/CodeGen/inline-asm-matching-ppc-vsx.c


Index: clang/test/CodeGen/inline-asm-matching-ppc-vsx.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/inline-asm-matching-ppc-vsx.c
@@ -0,0 +1,20 @@
+// REQUIRES: powerpc-registered-target
+
+// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -target-feature +vsx \
+// RUN:   -emit-llvm %s -o - | FileCheck %s
+
+// This case is to test VSX register support in the clobbers list for inline asm.
+void testVSX (void) {
+  unsigned int a = 0;
+  unsigned int *dbell=&a;
+  int d;
+  __asm__ __volatile__ (
+    "lxvw4x  %%vs32, 0, %2\n\t"
+    "stxvw4x %%vs32, 0, %1"
+    : "=m"(*(volatile unsigned int*)(dbell))
+    : "r" (dbell), "r" (&d)
+    : "vs32"
+  );
+}
+
+// CHECK: call void asm sideeffect "lxvw4x  %vs32, 0, $2\0A\09stxvw4x %vs32, 0, $1", "=*m,r,r,~{vs32}"
Index: clang/lib/Basic/Targets/PPC.h
===================================================================
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -176,6 +176,8 @@
 
   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
 
+  ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
+
   bool validateAsmConstraint(const char *&Name,
                              TargetInfo::ConstraintInfo &Info) const override {
     switch (*Name) {
Index: clang/lib/Basic/Targets/PPC.cpp
===================================================================
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -412,6 +412,29 @@
   return llvm::makeArrayRef(GCCRegAliases);
 }
 
+const TargetInfo::AddlRegName GCCAddlRegNames[] = {
+    {{"vs0"}, 0},   {{"vs1"}, 1},   {{"vs2"}, 2},   {{"vs3"}, 3}, 
+    {{"vs4"}, 4},   {{"vs5"}, 5},   {{"vs6"}, 6},   {{"vs7"}, 7},
+    {{"vs8"}, 8},   {{"vs9"}, 9},   {{"vs10"}, 10}, {{"vs11"}, 11},
+    {{"vs12"}, 12}, {{"vs13"}, 13}, {{"vs14"}, 14}, {{"vs15"}, 15},
+    {{"vs16"}, 16}, {{"vs17"}, 17}, {{"vs18"}, 18}, {{"vs19"}, 19},
+    {{"vs20"}, 20}, {{"vs21"}, 21}, {{"vs22"}, 22}, {{"vs23"}, 23},
+    {{"vs24"}, 24}, {{"vs25"}, 25}, {{"vs26"}, 26}, {{"vs27"}, 27},
+    {{"vs28"}, 28}, {{"vs29"}, 29}, {{"vs30"}, 30}, {{"vs31"}, 31},
+    {{"vs32"}, 32}, {{"vs33"}, 33}, {{"vs34"}, 34}, {{"vs35"}, 35},
+    {{"vs36"}, 36}, {{"vs37"}, 37}, {{"vs38"}, 38}, {{"vs39"}, 39},
+    {{"vs40"}, 40}, {{"vs41"}, 41}, {{"vs42"}, 42}, {{"vs43"}, 43},
+    {{"vs44"}, 44}, {{"vs45"}, 45}, {{"vs46"}, 46}, {{"vs47"}, 47},
+    {{"vs48"}, 48}, {{"vs49"}, 49}, {{"vs50"}, 50}, {{"vs51"}, 51},
+    {{"vs52"}, 52}, {{"vs53"}, 53}, {{"vs54"}, 54}, {{"vs55"}, 55},
+    {{"vs56"}, 56}, {{"vs57"}, 57}, {{"vs58"}, 58}, {{"vs59"}, 59},
+    {{"vs60"}, 60}, {{"vs61"}, 61}, {{"vs62"}, 62}, {{"vs63"}, 63},
+};
+
+ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
+  return llvm::makeArrayRef(GCCAddlRegNames);
+}
+
 static constexpr llvm::StringLiteral ValidCPUNames[] = {
     {"generic"}, {"440"},         {"450"},     {"601"},    {"602"},
     {"603"},     {"603e"},        {"603ev"},   {"604"},    {"604e"},


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