[PATCH] D50633: [AMDGPU] Add new Mode Register pass

[Tim Corringham via Phabricator via llvm-commits]

timcorringham updated this revision to Diff 176135.
timcorringham marked an inline comment as done.
timcorringham added a comment.

Reordered the cases dealt with in Phase 1 so that the most specific
case (setreg instruction) is performed first, allowing the removal
of one condition, and reduced indentation for that case accordingly.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D50633/new/

https://reviews.llvm.org/D50633

Files:
  lib/Target/AMDGPU/AMDGPU.h
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/CMakeLists.txt
  lib/Target/AMDGPU/SIDefines.h
  lib/Target/AMDGPU/SIInstrFormats.td
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/SIModeRegister.cpp
  lib/Target/AMDGPU/VOP1Instructions.td
  lib/Target/AMDGPU/VOP2Instructions.td
  lib/Target/AMDGPU/VOP3Instructions.td
  lib/Target/AMDGPU/VOP3PInstructions.td
  test/CodeGen/AMDGPU/mode-register.mir

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