[PATCH] D55059: [ARM] FP16: constant initialised v4f16 and v8f16 vectors

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added a comment.

Thanks for taking a look!

I am actually going to split this up in 3 patches:

- the changes in ARMISelDAGToDAG.cpp, the are related to (post-increment) VLD1, and should also be tested explicitly
- the changes in ARMInstrNEON.td, the bitcasts,
- and then this one to support BUILD_VECTOR.

> Please clean up the testcase so it only contains the relevant operations; the whole loop isn't necessary.

I think for testing this BUILD_VECTOR change, a loop is necessary, as this code is generated from:

  %vec.phi = phi <8 x half> [ zeroinitializer, %vector.ph ], [ %2, %vector.body ]

but I will have a look again.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55059/new/

https://reviews.llvm.org/D55059