[PATCH] D55071: [AMDGPU] Split 64-Bit XNOR to 64-Bit NOT/XOR

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:4908
+  MachineOperand &Src1 = Inst.getOperand(2);
+  DebugLoc DL = Inst.getDebugLoc();
+
----------------
const reference


================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:4927
+
+  BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B64), Interm).add(*Op0);
+
----------------
.add on next line


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Comment at: test/CodeGen/AMDGPU/xnor.ll:128
+  %r0.val = xor i64 %xor, -1
+  store i64 %r0.val, i64 addrspace(1)* %r0
+  ret void
----------------
It would be good if you can include some other use that requires SALU->VALU changes to stress that the wordlist insert happened


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55071/new/

https://reviews.llvm.org/D55071