[PATCH] D54882: [AMDGPU] Add sdwa support for ADD|SUB U64 decomposed Pseudos

Ron Lieberman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 29 09:38:34 PST 2018


ronlieb marked 3 inline comments as done.
ronlieb added inline comments.


================
Comment at: lib/Target/AMDGPU/SIPeepholeSDWA.cpp:922
+  // Make the new instruction.
+  auto NewInst =
+    BuildMI(*MISucc.getParent(), MISucc, MISucc.getDebugLoc(), SDWADesc);
----------------
ronlieb wrote:
> rampitec wrote:
> > You need to check for modifiers which you are going to drop by this conversion. For instance incoming instruction can be VOP3 OpSel. If it is OpSel you need to check that OpSel modifiers are trivial (e.g. have no effect and equivalent to VOP2). The same about VOP3 modifiers abs and neg.
> > 
> > You also need a mir test to check all negative cases when you cannot fold.
> leaving this one open, to work on the MIR test, and think about what modifiers might affect the V_ADD and B_SUB instructions.
at present the patch only accepts the ADD|SUB variants. I am adding a check for Mods which if present we will reject the instructions, ie not perform the _e64 -> _e32 change.

MIR Test added.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54882/new/

https://reviews.llvm.org/D54882





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