[PATCH] D50977: [TableGen] Prefer user-defined subregister compositions over inferred ones

[Aaron Ballman via llvm-commits]

On Mon, Nov 26, 2018 at 10:28 AM Aaron Ballman <aaron at aaronballman.com> wrote:
>
> On Wed, Sep 26, 2018 at 1:32 PM Krzysztof Parzyszek via Phabricator
> via llvm-commits <llvm-commits at lists.llvm.org> wrote:
> >
> > kparzysz added a comment.
> >
> > The warning seem to be plain wrong.  The warning claims that
> >
> >   warning: SubRegIndex SystemZ::subreg_h64 and SystemZ::subreg_h32 compose ambiguously as SystemZ::subreg_hh32 or SystemZ::subreg_h32
> >
> > This is based on `V0`: `subreg_h64(V0) = F0D`, `subreg_h32(F0D) = F0S`. So the composition (and `subreg_hh32`, user-defined as that composition) maps `V0` to `F0S`.  Now `subreg_h32(V0) = F0S`, so for `V0` these two indeed agree. This is the cause for the warning.
> > However, for `F0Q`, `subreg_h32(subreg_h64(F0Q)) = subreg_h32(F0D) = F0S`, while `subreg_h32(F0Q) = F2S`. So, while these compositions agree on at least one register, they are not equal in general.
>
> Is anything being done to address this warning? It's been several
> months and this still triggers in MSVC 2017.

Ping?

~Aaron