[PATCH] D50496: [RISCV] Implment pseudo instructions for load/store from a symbol address.

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

- I'd like to find a solution that doesn't get rid of the helpful error reporting we currently have for load/store. Downgrading all errors to just "invalid operand for instruction" is an unfortunate regression
- The F/D load/store are wrong as this patch has them accepting GPRs rather than FPR32/FPR64. The outs for PseudoSTORE also has a mistake
- We no longer have the shouldForceImmediate logic because associating custom parsers with operands was found to be superior. From some playing with a modified version of this patch it looks like more logic is needed to get these aliases to parse though...

I think defining the load/store classes like this makes sense:

  class PseudoLoadSym<RegisterClass rdty, string opcodestr>
      : Pseudo<(outs rdty:$rd), (ins bare_symbol:$addr), [],
                opcodestr, "$rd, $addr"> {
    let hasSideEffects = 0;
    let mayLoad = 1;
    let mayStore = 0;
    let isAsmParserOnly = 1;
  }
  
  class PseudoStoreSym<RegisterClass rs1ty, string opcodestr>
      : Pseudo<(outs GPR:$tmp), (ins rs1ty:$rs1, bare_symbol:$addr), [],
                opcodestr, "$rs1, $addr, $tmp"> {
    let hasSideEffects = 0;
    let mayLoad = 0;
    let mayStore = 1;
    let isAsmParserOnly = 1;
  }


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D50496/new/

https://reviews.llvm.org/D50496