[PATCH] D55008: [RISCV] Add CSR instruction aliases (imm. operands)
Luís Marques via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 28 09:10:21 PST 2018
luismarques created this revision.
luismarques added a reviewer: asb.
Herald added subscribers: llvm-commits, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, mgrang, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar.
This patch adds CSR instructions aliases for the cases where the instruction takes an immediate operand but the alias doesn't have the `i` suffix. This is necessary for GCC compatibility.
Repository:
rL LLVM
https://reviews.llvm.org/D55008
Files:
lib/Target/RISCV/RISCVInstrInfo.td
test/MC/RISCV/rvi-aliases-valid.s
Index: test/MC/RISCV/rvi-aliases-valid.s
===================================================================
--- test/MC/RISCV/rvi-aliases-valid.s
+++ test/MC/RISCV/rvi-aliases-valid.s
@@ -181,6 +181,26 @@
# CHECK-S-OBJ: csrci sscratch, 17
csrci 0x140, 0x11
+# CHECK-S-OBJ-NOALIAS: csrrwi zero, 336, 7
+# CHECK-S-OBJ: csrwi 336, 7
+csrw 0x150, 7
+# CHECK-S-OBJ-NOALIAS: csrrsi zero, 336, 7
+# CHECK-S-OBJ: csrsi 336, 7
+csrs 0x150, 7
+# CHECK-S-OBJ-NOALIAS: csrrci zero, 336, 7
+# CHECK-S-OBJ: csrci 336, 7
+csrc 0x150, 7
+
+# CHECK-S-OBJ-NOALIAS: csrrwi t0, 336, 15
+# CHECK-S-OBJ: csrrwi t0, 336, 15
+csrrw t0, 0x150, 0xf
+# CHECK-S-OBJ-NOALIAS: csrrsi t0, 4095, 16
+# CHECK-S-OBJ: csrrsi t0, 4095, 16
+csrrs t0, 0xfff, 0x10
+# CHECK-S-OBJ-NOALIAS: csrrci t0, sscratch, 17
+# CHECK-S-OBJ: csrrci t0, sscratch, 17
+csrrc t0, 0x140, 0x11
+
# CHECK-S-OBJ-NOALIAS: sfence.vma zero, zero
# CHECK-S-OBJ: sfence.vma
sfence.vma
Index: lib/Target/RISCV/RISCVInstrInfo.td
===================================================================
--- lib/Target/RISCV/RISCVInstrInfo.td
+++ lib/Target/RISCV/RISCVInstrInfo.td
@@ -568,6 +568,16 @@
def : InstAlias<"csrsi $csr, $imm", (CSRRSI X0, csr_sysreg:$csr, uimm5:$imm)>;
def : InstAlias<"csrci $csr, $imm", (CSRRCI X0, csr_sysreg:$csr, uimm5:$imm)>;
+let EmitPriority = 0 in {
+def : InstAlias<"csrw $csr, $imm", (CSRRWI X0, csr_sysreg:$csr, uimm5:$imm)>;
+def : InstAlias<"csrs $csr, $imm", (CSRRSI X0, csr_sysreg:$csr, uimm5:$imm)>;
+def : InstAlias<"csrc $csr, $imm", (CSRRCI X0, csr_sysreg:$csr, uimm5:$imm)>;
+
+def : InstAlias<"csrrw $rd, $csr, $imm", (CSRRWI GPR:$rd, csr_sysreg:$csr, uimm5:$imm)>;
+def : InstAlias<"csrrs $rd, $csr, $imm", (CSRRSI GPR:$rd, csr_sysreg:$csr, uimm5:$imm)>;
+def : InstAlias<"csrrc $rd, $csr, $imm", (CSRRCI GPR:$rd, csr_sysreg:$csr, uimm5:$imm)>;
+}
+
def : InstAlias<"sfence.vma", (SFENCE_VMA X0, X0)>;
def : InstAlias<"sfence.vma $rs", (SFENCE_VMA GPR:$rs, X0)>;
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