[PATCH] D53190: ARM: avoid infinite combining loop

[Sam Parker via Phabricator via llvm-commits]

samparker accepted this revision.
samparker added a comment.
This revision is now accepted and ready to land.

Great to see those other test changes! LGTM with the few minor comments, no need to re-review. cheers!



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Comment at: llvm/lib/Target/ARM/ARMISelLowering.h:88
       CMOV,         // ARM conditional move instructions.
+      OpaqueSUBS,   // Subtract that DAG combiner should ignore.
 
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Maybe just SUBS now? And with an updated comment.


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Comment at: llvm/lib/Target/ARM/ARMInstrInfo.td:3631
 
+
 // ADD and SUB with 's' bit set.
----------------
whitespace.


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Comment at: llvm/lib/Target/ARM/ARMInstrThumb.td:1285
 }
-
 def tSUBi8 :                    // A8.6.210 T2
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whitespace.


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Comment at: llvm/lib/Target/ARM/ARMInstrThumb2.td:2084
 
+
 // ADD and SUB with 's' bit set. No 12-bit immediate (T4) variants.
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whitespace.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D53190/new/

https://reviews.llvm.org/D53190