[llvm] r347681 - [X86] Add cascade lake arch in X86 target.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 27 10:05:01 PST 2018
Author: ctopper
Date: Tue Nov 27 10:05:00 2018
New Revision: 347681
URL: http://llvm.org/viewvc/llvm-project?rev=347681&view=rev
Log:
[X86] Add cascade lake arch in X86 target.
This is skylake-avx512 with the addition of avx512vnni ISA.
Patch by Jianping Chen
Differential Revision: https://reviews.llvm.org/D54785
Modified:
llvm/trunk/include/llvm/Support/X86TargetParser.def
llvm/trunk/lib/Support/Host.cpp
llvm/trunk/lib/Target/X86/X86.td
llvm/trunk/test/CodeGen/X86/cpus-intel.ll
Modified: llvm/trunk/include/llvm/Support/X86TargetParser.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/X86TargetParser.def?rev=347681&r1=347680&r2=347681&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/X86TargetParser.def (original)
+++ llvm/trunk/include/llvm/Support/X86TargetParser.def Tue Nov 27 10:05:00 2018
@@ -102,6 +102,7 @@ X86_CPU_SUBTYPE_COMPAT("icelake-server",
// Entries below this are not in libgcc/compiler-rt.
X86_CPU_SUBTYPE ("core2", INTEL_CORE2_65)
X86_CPU_SUBTYPE ("penryn", INTEL_CORE2_45)
+X86_CPU_SUBTYPE ("cascadelake", INTEL_COREI7_CASCADELAKE)
X86_CPU_SUBTYPE ("k6", AMDPENTIUM_K6)
X86_CPU_SUBTYPE ("k6-2", AMDPENTIUM_K62)
X86_CPU_SUBTYPE ("k6-3", AMDPENTIUM_K63)
Modified: llvm/trunk/lib/Support/Host.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=347681&r1=347680&r2=347681&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Host.cpp (original)
+++ llvm/trunk/lib/Support/Host.cpp Tue Nov 27 10:05:00 2018
@@ -702,6 +702,12 @@ getIntelProcessorTypeAndSubtype(unsigned
break;
}
+ if (Features2 & (1 << (X86::FEATURE_AVX512VNNI - 32))) {
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_CASCADELAKE;
+ break;
+ }
+
if (Features & (1 << X86::FEATURE_AVX512VL)) {
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512;
Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=347681&r1=347680&r2=347681&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Tue Nov 27 10:05:00 2018
@@ -883,6 +883,17 @@ class SkylakeServerProc<string Name> : P
def : SkylakeServerProc<"skylake-avx512">;
def : SkylakeServerProc<"skx">; // Legacy alias.
+def CLXFeatures : ProcessorFeatures<SKXFeatures.Value, [
+ FeatureVNNI
+]>;
+
+class CascadelakeProc<string Name> : ProcModel<Name, SkylakeServerModel,
+ CLXFeatures.Value, [
+ FeatureHasFastGather,
+ FeaturePOPCNTFalseDeps
+]>;
+def : CascadelakeProc<"cascadelake">;
+
def CNLFeatures : ProcessorFeatures<SKLFeatures.Value, [
FeatureAVX512,
FeatureCDI,
Modified: llvm/trunk/test/CodeGen/X86/cpus-intel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cpus-intel.ll?rev=347681&r1=347680&r2=347681&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cpus-intel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cpus-intel.ll Tue Nov 27 10:05:00 2018
@@ -34,6 +34,7 @@
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cascadelake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake-client 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake-server 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
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