[llvm] r347591 - [SelectionDAG] Teach BaseIndexOffset::match to unwrap the base after looking through an add/or

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 26 12:16:34 PST 2018


Author: ctopper
Date: Mon Nov 26 12:16:33 2018
New Revision: 347591

URL: http://llvm.org/viewvc/llvm-project?rev=347591&view=rev
Log:
[SelectionDAG] Teach BaseIndexOffset::match to unwrap the base after looking through an add/or

We might find a target specific node that needs to be unwrapped after we look through an add/or. Otherwise we get inconsistent results if one pointer is just X86WrapperRIP and the other is (add X86WrapperRIP, C)

Differential Revision: https://reviews.llvm.org/D54818

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
    llvm/trunk/test/CodeGen/X86/consecutive-load-shuffle.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp?rev=347591&r1=347590&r2=347591&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp Mon Nov 26 12:16:33 2018
@@ -107,14 +107,14 @@ BaseIndexOffset BaseIndexOffset::match(c
       if (auto *C = dyn_cast<ConstantSDNode>(Base->getOperand(1)))
         if (DAG.MaskedValueIsZero(Base->getOperand(0), C->getAPIntValue())) {
           Offset += C->getSExtValue();
-          Base = Base->getOperand(0);
+          Base = DAG.getTargetLoweringInfo().unwrapAddress(Base->getOperand(0));
           continue;
         }
       break;
     case ISD::ADD:
       if (auto *C = dyn_cast<ConstantSDNode>(Base->getOperand(1))) {
         Offset += C->getSExtValue();
-        Base = Base->getOperand(0);
+        Base = DAG.getTargetLoweringInfo().unwrapAddress(Base->getOperand(0));
         continue;
       }
       break;
@@ -130,7 +130,7 @@ BaseIndexOffset BaseIndexOffset::match(c
             Offset -= Off;
           else
             Offset += Off;
-          Base = LSBase->getBasePtr();
+          Base = DAG.getTargetLoweringInfo().unwrapAddress(LSBase->getBasePtr());
           continue;
         }
       break;

Modified: llvm/trunk/test/CodeGen/X86/consecutive-load-shuffle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/consecutive-load-shuffle.ll?rev=347591&r1=347590&r2=347591&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/consecutive-load-shuffle.ll (original)
+++ llvm/trunk/test/CodeGen/X86/consecutive-load-shuffle.ll Mon Nov 26 12:16:33 2018
@@ -11,9 +11,8 @@
 define void @foo2() {
 ; CHECK-LABEL: foo2:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
-; CHECK-NEXT:    movhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
-; CHECK-NEXT:    movapd %xmm0, {{.*}}(%rip)
+; CHECK-NEXT:    movaps {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    movaps %xmm0, {{.*}}(%rip)
 ; CHECK-NEXT:    retq
 entry:
   %0 = load <2 x float>, <2 x float>* bitcast (float* getelementptr inbounds ([4 x float], [4 x float]* @f, i64 0, i64 2) to <2 x float>*), align 8




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