[llvm] r347572 - AMDGPU: Only add implicit super-reg def for first subreg

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Mon Nov 26 09:02:01 2018
New Revision: 347572

URL: http://llvm.org/viewvc/llvm-project?rev=347572&view=rev
Log:
AMDGPU: Only add implicit super-reg def for first subreg

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp?rev=347572&r1=347571&r2=347572&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp Mon Nov 26 09:02:01 2018
@@ -901,7 +901,7 @@ bool SIRegisterInfo::restoreSGPR(Machine
         .addImm(0)                        // glc
         .addMemOperand(MMO);
 
-      if (NumSubRegs > 1)
+      if (NumSubRegs > 1 && i == 0)
         MIB.addReg(SuperReg, RegState::ImplicitDefine);
 
       continue;
@@ -915,7 +915,7 @@ bool SIRegisterInfo::restoreSGPR(Machine
         .addReg(Spill.VGPR)
         .addImm(Spill.Lane);
 
-      if (NumSubRegs > 1)
+      if (NumSubRegs > 1 && i == 0)
         MIB.addReg(SuperReg, RegState::ImplicitDefine);
     } else {
       if (OnlyToVGPR)